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Searched refs:twr (Results 1 – 25 of 49) sorted by relevance

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/external/speex/libspeexdsp/
Dkiss_fftr.c178 spx_word32_t f1kr, f1ki, twr, twi; in kiss_fftr2() local
243twr = SHR32(SUB32(MULT16_16(f2k.r,st->super_twiddles[k].r),MULT16_16(f2k.i,st->super_twiddles[k].i… in kiss_fftr2()
247 freqdata[2*k-1] = PSHR32(f1kr + twr, 15); in kiss_fftr2()
249 freqdata[2*(ncfft-k)-1] = PSHR32(f1kr - twr, 15); in kiss_fftr2()
252 freqdata[2*k-1] = .5f*(f1kr + twr); in kiss_fftr2()
254 freqdata[2*(ncfft-k)-1] = .5f*(f1kr - twr); in kiss_fftr2()
/external/u-boot/board/work-microwave/work_92105/
Dwork_92105_spl.c26 .twr = 66666666,
46 .twr = 66666666,
/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dlpddr3_stock.c18 u8 twr = max(ns_to_t(15), 3); in mctl_set_timing_params() local
43 u8 twtp = tcwl + 4 + twr + 1; in mctl_set_timing_params()
Dddr2_v3s.c18 u8 twr = max(ns_to_t(15), 3); in mctl_set_timing_params() local
43 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in mctl_set_timing_params()
Dddr3_1333.c18 u8 twr = max(ns_to_t(15), 3); in mctl_set_timing_params() local
43 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in mctl_set_timing_params()
/external/u-boot/arch/arm/mach-imx/mx6/
Dddr.c1000 u16 tras, twr, tmrd, trtp, twtr, trfc, txsr; in mx6_lpddr2_cfg() local
1052 twr = DIV_ROUND_UP(15000, clkper) - 1; in mx6_lpddr2_cfg()
1089 debug("twr=%d\n", twr); in mx6_lpddr2_cfg()
1142 mmdc0->mdcfg1 = (tras << 16) | (twr << 9) | (tmrd << 5) | twl; in mx6_lpddr2_cfg()
1231 u16 trcd, trc, tras, twr, tmrd, trtp, trp, twtr, trfc, txs, txpr; in mx6_ddr3_cfg() local
1332 twr = DIV_ROUND_UP(15000, clkper) - 1; in mx6_ddr3_cfg()
1365 debug("twr=%d\n", twr); in mx6_ddr3_cfg()
1378 debug("twr=%d\n", twr); in mx6_ddr3_cfg()
1436 (twr << 9) | (tmrd << 5) | tcwl; in mx6_ddr3_cfg()
1490 ((twr - 3) << 9) | /* Write Recovery */ in mx6_ddr3_cfg()
/external/u-boot/drivers/ram/
Dstm32_sdram.c125 u8 twr; member
198 | timing->twr << FMC_SDTR_TWR_SHIFT in stm32_sdram_init()
208 | timing->twr << FMC_SDTR_TWR_SHIFT in stm32_sdram_init()
/external/u-boot/arch/arm/dts/
Dls1021a-twr-lpuart.dts9 #include "ls1021a-twr.dtsi"
Dls1021a-twr-duart.dts9 #include "ls1021a-twr.dtsi"
Dvf610-twr.dts11 compatible = "fsl,vf610-twr", "fsl,vf610";
/external/u-boot/board/timll/devkit3250/
Ddevkit3250_spl.c33 .twr = 83000000, /* tWR = tRDL = 2 CLK */
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a83t.c100 u8 twr = max(ns_to_t(15), 3); in auto_set_timing_para() local
126 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in auto_set_timing_para()
165 twtp = tcwl + 4 + twr + 1; /* CWL + BL/2 + tWR */ in auto_set_timing_para()
Ddram_sun8i_a33.c100 u8 twr = max(ns_to_t(15), 3); in auto_set_timing_para() local
126 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in auto_set_timing_para()
/external/u-boot/include/
Dspd.h51 unsigned char twr; /* 36 Write Recovery time tWR */ member
/external/u-boot/drivers/ram/rockchip/
Ddmc-rk3368.c237 mr[0] = DDR3_MR0_WR(params->pctl_timing.twr) | in memory_init()
500 pctl_timing->twr = ps_to_tCK(15000, freq); in pctl_calc_timings()
502 if (pctl_timing->twr > 8) in pctl_calc_timings()
503 pctl_timing->twr = (pctl_timing->twr + 1) & ~1; in pctl_calc_timings()
/external/u-boot/configs/
Dvf610twr_nand_defconfig4 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
Dls1021atwr_nor_defconfig4 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Dvf610twr_defconfig4 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
Dls1021atwr_nor_lpuart_defconfig4 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
Dls1021atwr_nor_SECURE_BOOT_defconfig5 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Dls1021atwr_qspi_defconfig4 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Dls1021atwr_sdcard_ifc_defconfig9 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dsdram.h61 u32 twr; member
Dsdram_rk3036.h58 u32 twr; member
255 u32 twr; member
/external/u-boot/doc/device-tree-bindings/misc/
Dintel,baytrail-fsp.txt83 - fsp,dimm-twr
146 fsp,dimm-twr = <0xc>;

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