| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 256 define i32 @uadd16(i32 %a, i32 %b) nounwind {
257 ; CHECK-LABEL: uadd16
258 ; CHECK: uadd16 r0, r0, r1
259 %tmp = call i32 @llvm.arm.uadd16(i32 %a, i32 %b)
458 declare i32 @llvm.arm.uadd16(i32, i32) nounwind
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| D | arm-cgp-phis-calls-ret.ll | 190 ; promote %1 for the call - unless we can generate a uadd16.
193 ; CHECK-DSP-IMM: uadd16
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| D | arm-cgp-icmps.ll | 177 ; CHECK-DSP-IMM-NEXT: uadd16 r1, r3, r1
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 100 M(uadd16) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 99 M(uadd16) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 899 0x13,0x1f,0x52,0xe6 = uadd16 r1, r2, r3
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| D | basic-thumb2-instructions.s.cs | 1071 0x92,0xfa,0x43,0xf1 = uadd16 r1, r2, r3
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2297 uadd16 r1, r2, r3
2302 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 2804 uadd16 r1, r2, r3
2810 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3615 void uadd16(Condition cond, Register rd, Register rn, Register rm);
3616 void uadd16(Register rd, Register rn, Register rm) { uadd16(al, rd, rn, rm); } in uadd16() function
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| D | disasm-aarch32.h | 1360 void uadd16(Condition cond, Register rd, Register rn, Register rm);
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3357 uadd16 r1, r2, r3
3363 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1]
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| D | basic-arm-instructions.s | 3217 uadd16 r1, r2, r3
3222 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x52,0xe6]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3215 uadd16 r1, r2, r3
3220 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 3301 uadd16 r1, r2, r3
3307 @ CHECK: uadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2035 # CHECK: uadd16 r1, r2, r3
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| D | thumb2.txt | 2174 # CHECK: uadd16 r1, r2, r3
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2325 # CHECK: uadd16 r1, r2, r3
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| D | basic-arm-instructions.txt | 2208 # CHECK: uadd16 r1, r2, r3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2208 # CHECK: uadd16 r1, r2, r3
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| D | thumb2.txt | 2325 # CHECK: uadd16 r1, r2, r3
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1962 def t2UADD16 : T2I_pam<0b001, 0b0100, "uadd16">;
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| D | ARMInstrInfo.td | 3195 def UADD16 : AAI<0b01100101, 0b11110001, "uadd16">;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2235 def t2UADD16 : T2I_pam_intrinsics<0b001, 0b0100, "uadd16", int_arm_uadd16>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2167 def t2UADD16 : T2I_pam<0b001, 0b0100, "uadd16">;
|