/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | fmscs.ll | 8 ; VFP2: vnmls.f32 11 ; NEON: vnmls.f32 24 ; VFP2: vnmls.f64 27 ; NEON: vnmls.f64
|
D | vfp.ll | 58 ;CHECK: vnmls.f32
|
/external/llvm/test/CodeGen/ARM/ |
D | fmscs.ll | 8 ; VFP2: vnmls.f32 11 ; NEON: vnmls.f32 24 ; VFP2: vnmls.f64 27 ; NEON: vnmls.f64
|
D | vfp.ll | 58 ;CHECK: vnmls.f32
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | fmscs.ll | 8 ; VFP2: vnmls.f32 11 ; NEON: vnmls.f32 24 ; VFP2: vnmls.f64 27 ; NEON: vnmls.f64
|
D | vfp.ll | 58 ;CHECK: vnmls.f32
|
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | simple-fp-encoding.s | 111 @ CHECK: vnmls.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x52,0xee] 112 vnmls.f64 d16, d18, d17 114 @ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee] 115 vnmls.f32 s1, s2, s0
|
/external/capstone/suite/MC/ARM/ |
D | simple-fp-encoding.s.cs | 42 0xa1,0x0b,0x52,0xee = vnmls.f64 d16, d18, d17 43 0x00,0x0a,0x51,0xee = vnmls.f32 s1, s2, s0
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | simple-fp-encoding.s | 126 vnmls.f64 d16, d18, d17 127 vnmls.f32 s1, s2, s0 129 @ CHECK: vnmls.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x52,0xee] 130 @ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee]
|
D | fullfp16.s | 36 vnmls.f16 s1, s2, s0 37 @ ARM: vnmls.f16 s1, s2, s0 @ encoding: [0x00,0x09,0x51,0xee] 38 @ THUMB: vnmls.f16 s1, s2, s0 @ encoding: [0x51,0xee,0x00,0x09]
|
D | single-precision-fp.s | 24 vnmls.f64 d2, d1, d0 36 @ CHECK-ERRORS-NEXT: vnmls.f64 d2, d1, d0
|
D | fullfp16-neg.s | 28 vnmls.f16 s1, s2, s0
|
/external/llvm/test/MC/ARM/ |
D | simple-fp-encoding.s | 114 vnmls.f64 d16, d18, d17 115 vnmls.f32 s1, s2, s0 117 @ CHECK: vnmls.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x52,0xee] 118 @ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee]
|
D | fullfp16.s | 36 vnmls.f16 s1, s2, s0 37 @ ARM: vnmls.f16 s1, s2, s0 @ encoding: [0x00,0x09,0x51,0xee] 38 @ THUMB: vnmls.f16 s1, s2, s0 @ encoding: [0x51,0xee,0x00,0x09]
|
D | single-precision-fp.s | 24 vnmls.f64 d2, d1, d0 36 @ CHECK-ERRORS-NEXT: vnmls.f64 d2, d1, d0
|
D | fullfp16-neg.s | 28 vnmls.f16 s1, s2, s0
|
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | fp-encoding.txt | 106 # CHECK: vnmls.f64 d16, d18, d17 109 # CHECK: vnmls.f32 s1, s2, s0
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | fp-encoding.txt | 106 # CHECK: vnmls.f64 d16, d18, d17 109 # CHECK: vnmls.f32 s1, s2, s0
|
D | fullfp16-thumb.txt | 27 # CHECK: vnmls.f16 s1, s2, s0
|
D | fullfp16-arm.txt | 27 # CHECK: vnmls.f16 s1, s2, s0
|
/external/llvm/test/MC/Disassembler/ARM/ |
D | fp-encoding.txt | 106 # CHECK: vnmls.f64 d16, d18, d17 109 # CHECK: vnmls.f32 s1, s2, s0
|
D | fullfp16-arm.txt | 27 # CHECK: vnmls.f16 s1, s2, s0
|
D | fullfp16-thumb.txt | 27 # CHECK: vnmls.f16 s1, s2, s0
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrVFP.td | 1002 IIC_fpMAC64, "vnmls", ".f64\t$Dd, $Dn, $Dm", 1010 IIC_fpMAC32, "vnmls", ".f32\t$Sd, $Sn, $Sm",
|
/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 5076 void vnmls( 5078 void vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vnmls() function 5079 vnmls(al, dt, rd, rn, rm); in vnmls() 5082 void vnmls( 5084 void vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vnmls() function 5085 vnmls(al, dt, rd, rn, rm); in vnmls()
|