1 /********************************************************** 2 * Copyright 2008-2009 VMware, Inc. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 * 24 **********************************************************/ 25 26 #ifndef SVGA_CONTEXT_H 27 #define SVGA_CONTEXT_H 28 29 30 #include "pipe/p_context.h" 31 #include "pipe/p_defines.h" 32 #include "pipe/p_state.h" 33 34 #include "util/os_time.h" 35 36 #include "util/u_blitter.h" 37 #include "util/list.h" 38 39 #include "tgsi/tgsi_scan.h" 40 41 #include "svga_screen.h" 42 #include "svga_state.h" 43 #include "svga_winsys.h" 44 #include "svga_hw_reg.h" 45 #include "svga3d_shaderdefs.h" 46 47 48 /** Non-GPU queries for gallium HUD */ 49 enum svga_hud { 50 /* per-frame counters */ 51 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC, 52 SVGA_QUERY_NUM_FALLBACKS, 53 SVGA_QUERY_NUM_FLUSHES, 54 SVGA_QUERY_NUM_VALIDATIONS, 55 SVGA_QUERY_MAP_BUFFER_TIME, 56 SVGA_QUERY_NUM_BUFFERS_MAPPED, 57 SVGA_QUERY_NUM_TEXTURES_MAPPED, 58 SVGA_QUERY_NUM_BYTES_UPLOADED, 59 SVGA_QUERY_COMMAND_BUFFER_SIZE, 60 SVGA_QUERY_FLUSH_TIME, 61 SVGA_QUERY_SURFACE_WRITE_FLUSHES, 62 SVGA_QUERY_NUM_READBACKS, 63 SVGA_QUERY_NUM_RESOURCE_UPDATES, 64 SVGA_QUERY_NUM_BUFFER_UPLOADS, 65 SVGA_QUERY_NUM_CONST_BUF_UPDATES, 66 SVGA_QUERY_NUM_CONST_UPDATES, 67 68 /* running total counters */ 69 SVGA_QUERY_MEMORY_USED, 70 SVGA_QUERY_NUM_SHADERS, 71 SVGA_QUERY_NUM_RESOURCES, 72 SVGA_QUERY_NUM_STATE_OBJECTS, 73 SVGA_QUERY_NUM_SURFACE_VIEWS, 74 SVGA_QUERY_NUM_GENERATE_MIPMAP, 75 SVGA_QUERY_NUM_FAILED_ALLOCATIONS, 76 SVGA_QUERY_NUM_COMMANDS_PER_DRAW, 77 78 /*SVGA_QUERY_MAX has to be last because it is size of an array*/ 79 SVGA_QUERY_MAX 80 }; 81 82 /** 83 * Maximum supported number of constant buffers per shader 84 */ 85 #define SVGA_MAX_CONST_BUFS 14 86 87 /** 88 * Maximum constant buffer size that can be set in the 89 * DXSetSingleConstantBuffer command is 90 * DX10 constant buffer element count * 4 4-bytes components 91 */ 92 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int)) 93 94 #define CONST0_UPLOAD_ALIGNMENT 256 95 96 struct draw_vertex_shader; 97 struct draw_fragment_shader; 98 struct svga_shader_variant; 99 struct SVGACmdMemory; 100 struct util_bitmask; 101 102 103 struct svga_cache_context; 104 struct svga_tracked_state; 105 106 struct svga_blend_state { 107 unsigned need_white_fragments:1; 108 unsigned independent_blend_enable:1; 109 unsigned alpha_to_coverage:1; 110 unsigned alpha_to_one:1; 111 unsigned blend_color_alpha:1; /**< set blend color to alpha value */ 112 113 /** Per-render target state */ 114 struct { 115 uint8_t writemask; 116 117 boolean blend_enable; 118 uint8_t srcblend; 119 uint8_t dstblend; 120 uint8_t blendeq; 121 122 boolean separate_alpha_blend_enable; 123 uint8_t srcblend_alpha; 124 uint8_t dstblend_alpha; 125 uint8_t blendeq_alpha; 126 } rt[PIPE_MAX_COLOR_BUFS]; 127 128 SVGA3dBlendStateId id; /**< vgpu10 */ 129 }; 130 131 struct svga_depth_stencil_state { 132 unsigned zfunc:8; 133 unsigned zenable:1; 134 unsigned zwriteenable:1; 135 136 unsigned alphatestenable:1; 137 unsigned alphafunc:8; 138 139 struct { 140 unsigned enabled:1; 141 unsigned func:8; 142 unsigned fail:8; 143 unsigned zfail:8; 144 unsigned pass:8; 145 } stencil[2]; 146 147 /* SVGA3D has one ref/mask/writemask triple shared between front & 148 * back face stencil. We really need two: 149 */ 150 unsigned stencil_mask:8; 151 unsigned stencil_writemask:8; 152 153 float alpharef; 154 155 SVGA3dDepthStencilStateId id; /**< vgpu10 */ 156 }; 157 158 #define SVGA_UNFILLED_DISABLE 0 159 #define SVGA_UNFILLED_LINE 1 160 #define SVGA_UNFILLED_POINT 2 161 162 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS) 163 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES) 164 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES) 165 166 struct svga_rasterizer_state { 167 struct pipe_rasterizer_state templ; /* needed for draw module */ 168 169 unsigned shademode:8; 170 unsigned cullmode:8; 171 unsigned scissortestenable:1; 172 unsigned multisampleantialias:1; 173 unsigned antialiasedlineenable:1; 174 unsigned lastpixel:1; 175 unsigned pointsprite:1; 176 177 unsigned linepattern; 178 179 float slopescaledepthbias; 180 float depthbias; 181 float pointsize; 182 float linewidth; 183 184 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */ 185 186 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */ 187 unsigned need_pipeline:16; 188 189 SVGA3dRasterizerStateId id; /**< vgpu10 */ 190 191 /** For debugging: */ 192 const char* need_pipeline_tris_str; 193 const char* need_pipeline_lines_str; 194 const char* need_pipeline_points_str; 195 }; 196 197 struct svga_sampler_state { 198 unsigned mipfilter; 199 unsigned magfilter; 200 unsigned minfilter; 201 unsigned aniso_level; 202 float lod_bias; 203 unsigned addressu; 204 unsigned addressv; 205 unsigned addressw; 206 unsigned bordercolor; 207 unsigned normalized_coords:1; 208 unsigned compare_mode:1; 209 unsigned compare_func:3; 210 211 unsigned min_lod; 212 unsigned view_min_lod; 213 unsigned view_max_lod; 214 215 SVGA3dSamplerId id[2]; 216 }; 217 218 219 struct svga_pipe_sampler_view 220 { 221 struct pipe_sampler_view base; 222 223 SVGA3dShaderResourceViewId id; 224 }; 225 226 227 static inline struct svga_pipe_sampler_view * svga_pipe_sampler_view(struct pipe_sampler_view * v)228 svga_pipe_sampler_view(struct pipe_sampler_view *v) 229 { 230 return (struct svga_pipe_sampler_view *) v; 231 } 232 233 234 struct svga_velems_state { 235 unsigned count; 236 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; 237 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */ 238 239 /** Bitmasks indicating which attributes need format conversion */ 240 unsigned adjust_attrib_range; /**< range adjustment */ 241 unsigned attrib_is_pure_int; /**< pure int */ 242 unsigned adjust_attrib_w_1; /**< set w = 1 */ 243 unsigned adjust_attrib_itof; /**< int->float */ 244 unsigned adjust_attrib_utof; /**< uint->float */ 245 unsigned attrib_is_bgra; /**< R / B swizzling */ 246 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */ 247 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */ 248 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */ 249 250 boolean need_swvfetch; 251 252 SVGA3dElementLayoutId id; /**< VGPU10 */ 253 }; 254 255 256 /* Use to calculate differences between state emitted to hardware and 257 * current driver-calculated state. 258 */ 259 struct svga_state 260 { 261 const struct svga_blend_state *blend; 262 const struct svga_depth_stencil_state *depth; 263 const struct svga_rasterizer_state *rast; 264 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 265 const struct svga_velems_state *velems; 266 267 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */ 268 struct svga_fragment_shader *fs; 269 struct svga_vertex_shader *vs; 270 struct svga_geometry_shader *user_gs; /* user-specified GS */ 271 struct svga_geometry_shader *gs; /* derived GS */ 272 273 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; 274 /** Constant buffers for each shader. 275 * The size should probably always match with that of 276 * svga_shader_emitter_v10.num_shader_consts. 277 */ 278 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS]; 279 280 struct pipe_framebuffer_state framebuffer; 281 float depthscale; 282 283 /* Hack to limit the number of different render targets between 284 * flushes. Helps avoid blowing out our surface cache in EXA. 285 */ 286 int nr_fbs; 287 288 struct pipe_poly_stipple poly_stipple; 289 struct pipe_scissor_state scissor; 290 struct pipe_blend_color blend_color; 291 struct pipe_stencil_ref stencil_ref; 292 struct pipe_clip_state clip; 293 struct pipe_viewport_state viewport; 294 295 unsigned num_samplers[PIPE_SHADER_TYPES]; 296 unsigned num_sampler_views[PIPE_SHADER_TYPES]; 297 unsigned num_vertex_buffers; 298 enum pipe_prim_type reduced_prim; 299 300 struct { 301 unsigned flag_1d; 302 unsigned flag_srgb; 303 unsigned flag_rect; /* sampler views with rectangular texture target */ 304 unsigned flag_buf; /* sampler views with texture buffer target */ 305 } tex_flags; 306 307 unsigned sample_mask; 308 }; 309 310 struct svga_prescale { 311 float translate[4]; 312 float scale[4]; 313 boolean enabled; 314 }; 315 316 317 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR ) 318 */ 319 struct svga_hw_clear_state 320 { 321 SVGA3dRect viewport; 322 323 struct { 324 float zmin, zmax; 325 } depthrange; 326 327 struct pipe_framebuffer_state framebuffer; 328 struct svga_prescale prescale; 329 330 /* VGPU10 state */ 331 unsigned num_rendertargets; 332 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS]; 333 struct pipe_surface *dsv; 334 }; 335 336 struct svga_hw_view_state 337 { 338 struct pipe_resource *texture; 339 struct svga_sampler_view *v; 340 unsigned min_lod; 341 unsigned max_lod; 342 boolean dirty; 343 }; 344 345 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW ) 346 */ 347 struct svga_hw_draw_state 348 { 349 /** VGPU9 rasterization state */ 350 unsigned rs[SVGA3D_RS_MAX]; 351 /** VGPU9 texture sampler and bindings state */ 352 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX]; 353 354 /** VGPU9 texture views */ 355 unsigned num_views; 356 unsigned num_backed_views; /* views with backing copy of texture */ 357 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS]; 358 359 /** VGPU9 constant buffer values */ 360 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4]; 361 362 /** Currently bound shaders */ 363 struct svga_shader_variant *fs; 364 struct svga_shader_variant *vs; 365 struct svga_shader_variant *gs; 366 367 /** Currently bound constant buffer, per shader stage */ 368 struct pipe_resource *constbuf[PIPE_SHADER_TYPES]; 369 370 /** Bitmask of enabled constant buffers */ 371 unsigned enabled_constbufs[PIPE_SHADER_TYPES]; 372 373 /** 374 * These are used to reduce the number of times we call u_upload_unmap() 375 * while updating the zero-th/default VGPU10 constant buffer. 376 */ 377 struct pipe_resource *const0_buffer; 378 struct svga_winsys_surface *const0_handle; 379 380 /** VGPU10 HW state (used to prevent emitting redundant state) */ 381 SVGA3dDepthStencilStateId depth_stencil_id; 382 unsigned stencil_ref; 383 SVGA3dBlendStateId blend_id; 384 float blend_factor[4]; 385 unsigned blend_sample_mask; 386 SVGA3dRasterizerStateId rasterizer_id; 387 SVGA3dElementLayoutId layout_id; 388 SVGA3dPrimitiveType topology; 389 390 /** Vertex buffer state */ 391 SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS]; 392 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS]; 393 unsigned num_vbuffers; 394 395 struct pipe_resource *ib; /**< index buffer for drawing */ 396 SVGA3dSurfaceFormat ib_format; 397 unsigned ib_offset; 398 399 unsigned num_samplers[PIPE_SHADER_TYPES]; 400 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 401 402 unsigned num_sampler_views[PIPE_SHADER_TYPES]; 403 struct pipe_sampler_view 404 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 405 406 /* used for rebinding */ 407 unsigned default_constbuf_size[PIPE_SHADER_TYPES]; 408 409 boolean rasterizer_discard; /* set if rasterization is disabled */ 410 boolean has_backed_views; /* set if any of the rtv/dsv is a backed surface view */ 411 }; 412 413 414 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL ) 415 */ 416 struct svga_sw_state 417 { 418 /* which parts we need */ 419 boolean need_swvfetch; 420 boolean need_pipeline; 421 boolean need_swtnl; 422 423 /* Flag to make sure that need sw is on while 424 * updating state within a swtnl call. 425 */ 426 boolean in_swtnl_draw; 427 }; 428 429 430 /* Queue some state updates (like rss) and submit them to hardware in 431 * a single packet. 432 */ 433 struct svga_hw_queue; 434 435 struct svga_query; 436 struct svga_qmem_alloc_entry; 437 438 struct svga_context 439 { 440 struct pipe_context pipe; 441 struct svga_winsys_context *swc; 442 struct blitter_context *blitter; 443 struct u_upload_mgr *const0_upload; 444 struct u_upload_mgr *tex_upload; 445 446 struct { 447 boolean no_swtnl; 448 boolean force_swtnl; 449 boolean use_min_mipmap; 450 451 /* incremented for each shader */ 452 unsigned shader_id; 453 454 boolean no_line_width; 455 boolean force_hw_line_stipple; 456 457 /** To report perf/conformance/etc issues to the state tracker */ 458 struct pipe_debug_callback callback; 459 } debug; 460 461 struct { 462 struct draw_context *draw; 463 struct vbuf_render *backend; 464 unsigned hw_prim; 465 boolean new_vbuf; 466 boolean new_vdecl; 467 } swtnl; 468 469 /* Bitmask of blend state objects IDs */ 470 struct util_bitmask *blend_object_id_bm; 471 472 /* Bitmask of depth/stencil state objects IDs */ 473 struct util_bitmask *ds_object_id_bm; 474 475 /* Bitmaks of input element object IDs */ 476 struct util_bitmask *input_element_object_id_bm; 477 478 /* Bitmask of rasterizer object IDs */ 479 struct util_bitmask *rast_object_id_bm; 480 481 /* Bitmask of sampler state objects IDs */ 482 struct util_bitmask *sampler_object_id_bm; 483 484 /* Bitmask of sampler view IDs */ 485 struct util_bitmask *sampler_view_id_bm; 486 487 /* Bitmask of used shader IDs */ 488 struct util_bitmask *shader_id_bm; 489 490 /* Bitmask of used surface view IDs */ 491 struct util_bitmask *surface_view_id_bm; 492 493 /* Bitmask of used stream output IDs */ 494 struct util_bitmask *stream_output_id_bm; 495 496 /* Bitmask of used query IDs */ 497 struct util_bitmask *query_id_bm; 498 499 struct { 500 unsigned dirty[SVGA_STATE_MAX]; 501 502 /** bitmasks of which const buffers are changed */ 503 unsigned dirty_constbufs[PIPE_SHADER_TYPES]; 504 505 unsigned texture_timestamp; 506 507 struct svga_sw_state sw; 508 struct svga_hw_draw_state hw_draw; 509 struct svga_hw_clear_state hw_clear; 510 } state; 511 512 struct svga_state curr; /* state from the state tracker */ 513 unsigned dirty; /* statechanges since last update_state() */ 514 515 union { 516 struct { 517 unsigned rendertargets:1; 518 unsigned texture_samplers:1; 519 unsigned constbufs:1; 520 unsigned vs:1; 521 unsigned fs:1; 522 unsigned gs:1; 523 unsigned query:1; 524 } flags; 525 unsigned val; 526 } rebind; 527 528 struct svga_hwtnl *hwtnl; 529 530 /** Queries states */ 531 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */ 532 unsigned gb_query_len; /**< gb query object size */ 533 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */ 534 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX]; 535 /**< query mem block mapping */ 536 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */ 537 538 /** List of buffers with queued transfers */ 539 struct list_head dirty_buffers; 540 541 /** performance / info queries for HUD */ 542 struct { 543 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */ 544 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */ 545 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */ 546 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */ 547 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */ 548 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */ 549 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */ 550 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */ 551 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */ 552 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */ 553 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */ 554 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */ 555 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */ 556 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */ 557 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */ 558 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */ 559 560 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */ 561 uint64_t num_blend_objects; 562 uint64_t num_depthstencil_objects; 563 uint64_t num_rasterizer_objects; 564 uint64_t num_sampler_objects; 565 uint64_t num_samplerview_objects; 566 uint64_t num_vertexelement_objects; 567 568 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */ 569 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */ 570 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */ 571 572 boolean uses_time; /**< os_time_get() calls needed? */ 573 } hud; 574 575 /** The currently bound stream output targets */ 576 unsigned num_so_targets; 577 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS]; 578 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS]; 579 struct svga_stream_output *current_so; 580 581 /** A blend state with blending disabled, for falling back to when blending 582 * is illegal (e.g. an integer texture is bound) 583 */ 584 struct svga_blend_state *noop_blend; 585 586 struct { 587 struct pipe_resource *texture; 588 struct svga_pipe_sampler_view *sampler_view; 589 void *sampler; 590 } polygon_stipple; 591 592 /** Alternate rasterizer states created for point sprite */ 593 struct svga_rasterizer_state *rasterizer_no_cull[2]; 594 595 /** Depth stencil state created to disable depth stencil test */ 596 struct svga_depth_stencil_state *depthstencil_disable; 597 598 /** Current conditional rendering predicate */ 599 struct { 600 SVGA3dQueryId query_id; 601 boolean cond; 602 } pred; 603 604 boolean render_condition; 605 boolean disable_rasterizer; /* Set if to disable rasterization */ 606 }; 607 608 /* A flag for each state_tracker state object: 609 */ 610 #define SVGA_NEW_BLEND 0x1 611 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2 612 #define SVGA_NEW_RAST 0x4 613 #define SVGA_NEW_SAMPLER 0x8 614 #define SVGA_NEW_TEXTURE 0x10 615 #define SVGA_NEW_VBUFFER 0x20 616 #define SVGA_NEW_VELEMENT 0x40 617 #define SVGA_NEW_FS 0x80 618 #define SVGA_NEW_VS 0x100 619 #define SVGA_NEW_FS_CONST_BUFFER 0x200 620 #define SVGA_NEW_VS_CONST_BUFFER 0x400 621 #define SVGA_NEW_FRAME_BUFFER 0x800 622 #define SVGA_NEW_STIPPLE 0x1000 623 #define SVGA_NEW_SCISSOR 0x2000 624 #define SVGA_NEW_BLEND_COLOR 0x4000 625 #define SVGA_NEW_CLIP 0x8000 626 #define SVGA_NEW_VIEWPORT 0x10000 627 #define SVGA_NEW_PRESCALE 0x20000 628 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000 629 #define SVGA_NEW_TEXTURE_BINDING 0x80000 630 #define SVGA_NEW_NEED_PIPELINE 0x100000 631 #define SVGA_NEW_NEED_SWVFETCH 0x200000 632 #define SVGA_NEW_NEED_SWTNL 0x400000 633 #define SVGA_NEW_FS_VARIANT 0x800000 634 #define SVGA_NEW_VS_VARIANT 0x1000000 635 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000 636 #define SVGA_NEW_STENCIL_REF 0x8000000 637 #define SVGA_NEW_GS 0x10000000 638 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000 639 #define SVGA_NEW_GS_VARIANT 0x40000000 640 #define SVGA_NEW_TEXTURE_CONSTS 0x80000000 641 642 643 void svga_init_state_functions( struct svga_context *svga ); 644 void svga_init_flush_functions( struct svga_context *svga ); 645 void svga_init_string_functions( struct svga_context *svga ); 646 void svga_init_blit_functions(struct svga_context *svga); 647 648 void svga_init_blend_functions( struct svga_context *svga ); 649 void svga_init_depth_stencil_functions( struct svga_context *svga ); 650 void svga_init_misc_functions( struct svga_context *svga ); 651 void svga_init_rasterizer_functions( struct svga_context *svga ); 652 void svga_init_sampler_functions( struct svga_context *svga ); 653 void svga_init_fs_functions( struct svga_context *svga ); 654 void svga_init_vs_functions( struct svga_context *svga ); 655 void svga_init_gs_functions( struct svga_context *svga ); 656 void svga_init_vertex_functions( struct svga_context *svga ); 657 void svga_init_constbuffer_functions( struct svga_context *svga ); 658 void svga_init_draw_functions( struct svga_context *svga ); 659 void svga_init_query_functions( struct svga_context *svga ); 660 void svga_init_surface_functions(struct svga_context *svga); 661 void svga_init_stream_output_functions( struct svga_context *svga ); 662 void svga_init_clear_functions( struct svga_context *svga ); 663 664 void svga_cleanup_vertex_state( struct svga_context *svga ); 665 void svga_cleanup_sampler_state( struct svga_context *svga ); 666 void svga_cleanup_tss_binding( struct svga_context *svga ); 667 void svga_cleanup_framebuffer( struct svga_context *svga ); 668 669 void svga_context_flush( struct svga_context *svga, 670 struct pipe_fence_handle **pfence ); 671 672 void svga_context_finish(struct svga_context *svga); 673 674 void svga_hwtnl_flush_retry( struct svga_context *svga ); 675 void svga_hwtnl_flush_buffer( struct svga_context *svga, 676 struct pipe_resource *buffer ); 677 678 void svga_surfaces_flush(struct svga_context *svga); 679 680 struct pipe_context * 681 svga_context_create(struct pipe_screen *screen, 682 void *priv, unsigned flags); 683 684 void svga_toggle_render_condition(struct svga_context *svga, 685 boolean render_condition_enabled, 686 boolean on); 687 688 /*********************************************************************** 689 * Inline conversion functions. These are better-typed than the 690 * macros used previously: 691 */ 692 static inline struct svga_context * svga_context(struct pipe_context * pipe)693 svga_context( struct pipe_context *pipe ) 694 { 695 return (struct svga_context *)pipe; 696 } 697 698 static inline struct svga_winsys_screen * svga_sws(struct svga_context * svga)699 svga_sws(struct svga_context *svga) 700 { 701 return svga_screen(svga->pipe.screen)->sws; 702 } 703 704 static inline boolean svga_have_gb_objects(const struct svga_context * svga)705 svga_have_gb_objects(const struct svga_context *svga) 706 { 707 return svga_screen(svga->pipe.screen)->sws->have_gb_objects; 708 } 709 710 static inline boolean svga_have_gb_dma(const struct svga_context * svga)711 svga_have_gb_dma(const struct svga_context *svga) 712 { 713 return svga_screen(svga->pipe.screen)->sws->have_gb_dma; 714 } 715 716 static inline boolean svga_have_vgpu10(const struct svga_context * svga)717 svga_have_vgpu10(const struct svga_context *svga) 718 { 719 return svga_screen(svga->pipe.screen)->sws->have_vgpu10; 720 } 721 722 static inline boolean svga_need_to_rebind_resources(const struct svga_context * svga)723 svga_need_to_rebind_resources(const struct svga_context *svga) 724 { 725 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources; 726 } 727 728 static inline boolean svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)729 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2) 730 { 731 return memcmp(r1, r2, sizeof(*r1)) == 0; 732 } 733 734 /** 735 * If the Gallium HUD is enabled, this will return the current time. 736 * Otherwise, just return zero. 737 */ 738 static inline int64_t svga_get_time(struct svga_context * svga)739 svga_get_time(struct svga_context *svga) 740 { 741 return svga->hud.uses_time ? os_time_get() : 0; 742 } 743 744 745 #endif 746