Lines Matching refs:opnd2

1433     uint32_t opnd2 = model.addOperation2To1V1_0(0, opnd0, opnd1);  in TEST_F()  local
1435 uint32_t opnd4 = model.addOperation2To1V1_0(1, opnd2, opnd3); in TEST_F()
1490 StepModelOutputSetType{{opnd2, b0Opnd2}}, // tempsAsStepModelOutputs in TEST_F()
1511 RemapVectorType{{opnd2, b1Opnd2}}, // tempsAsStepModelInputs in TEST_F()
1521 uint32_t opnd2 = model.addOperation2To1V1_0(0, opnd0, opnd1); in TEST_F() local
1524 uint32_t opnd5 = model.addOperation2To1V1_2(0, opnd2, opnd3); in TEST_F()
1525 uint32_t opnd6 = model.addOperation1To1V1_3(0, opnd2); in TEST_F()
1526 model.identifyInputsAndOutputs({opnd0, opnd1}, {opnd2, opnd4, opnd5, opnd6}); in TEST_F()
1590 RemapVectorType{{opnd2, b1Opnd2}}, // modelOutputs in TEST_F()
1612 RemapVectorType{{opnd2, b2Opnd0}})); // outputsAsStepModelInputs in TEST_F()
1635 RemapVectorType{{opnd2, b3Opnd0}})); // outputsAsStepModelInputs in TEST_F()
1683 uint32_t opnd2 = model.addOperation2To1V1_0(kDevOp, opnd0, opnd1); in TEST_F() local
1684 uint32_t opnd3 = model.addOperation2To1V1_0(kDevOp, opnd0, opnd2); in TEST_F()
1687 uint32_t opnd5 = model.addOperation2To1V1_0(kCpuOp, opnd2, opnd4); in TEST_F()
1723 StepModelOutputSetType{{opnd2, m0Opnd2}, in TEST_F()
1745 RemapVectorType{{opnd3, m1Opnd3}, {opnd2, m1Opnd2}}, // tempsAsStepModelInputs in TEST_F()
1776 uint32_t opnd2 = in TEST_F() local
1779 uint32_t opnd4 = model.addOperation2To1V1_0(1, opnd2, opnd3); in TEST_F()
1833 uint32_t opnd2 = model.addOperation2To1V1_0(0, opnd0, opnd1); in TEST_F() local
1834 uint32_t opnd3 = model.addOperation2To1V1_0(1, opnd2, opnd2); in TEST_F()
1835 model.identifyInputsAndOutputs({opnd0, opnd1}, {opnd2, opnd3}); in TEST_F()
1863 RemapVectorType{{opnd2, m0Opnd2}}, // modelOutputs in TEST_F()
1882 RemapVectorType{{opnd2, m1Opnd2}})); // outputsAsStepModelInputs in TEST_F()
1937 uint32_t opnd2 = model.addOperation2To1V1_0(0, opnd0, opnd1); in TEST_F() local
1938 model.identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in TEST_F()
2146 uint32_t opnd2 = model->addOperation2To1V1_0(0, opnd0, opnd1); in createModelForCachingTests() local
2148 uint32_t opnd4 = model->addOperation2To1V1_0(1, opnd2, opnd3); in createModelForCachingTests()
2163 const uint32_t opnd2 = trueModel->addOperation2To1V1_0(0, opnd0, opnd1); in createControlFlowModelForCachingTests() local
2164 trueModel->identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in createControlFlowModelForCachingTests()
2173 const uint32_t opnd2 = falseModel->addOperation2To1V1_0(0, opnd0, opnd1); in createControlFlowModelForCachingTests() local
2174 falseModel->identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in createControlFlowModelForCachingTests()
2183 const uint32_t opnd2 = mainModel->addFloatOperand(); in createControlFlowModelForCachingTests() local
2185 mainModel->addIfOperation(opnd0, *trueModel, *falseModel, {opnd1, opnd2}, {opnd3}); in createControlFlowModelForCachingTests()
2186 mainModel->identifyInputsAndOutputs({opnd0, opnd1, opnd2}, {opnd3}); in createControlFlowModelForCachingTests()
2563 const uint32_t opnd2 = model->addOperation2To1V1_0(0, opnd0, opnd1); in createBranchOrBodyModel() local
2564 model->identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in createBranchOrBodyModel()
2577 const uint32_t opnd2 = model->addExplicitOperationXTo1( in createCondModel() local
2579 model->identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in createCondModel()
2598 const uint32_t opnd2 = mainModel->addFloatOperand(); in createIfModel() local
2600 mainModel->addIfOperation(opnd0, *thenModel, *elseModel, {opnd1, opnd2}, {opnd3}); in createIfModel()
2601 mainModel->identifyInputsAndOutputs({opnd0, opnd1, opnd2}, {opnd3}); in createIfModel()
2625 const uint32_t opnd2 = mainModel->addFloatOperand(); in createWhileModel() local
2626 mainModel->addWhileOperation(*condModel, *bodyModel, {opnd0, opnd1}, {opnd2}); in createWhileModel()
2627 mainModel->identifyInputsAndOutputs({opnd0, opnd1}, {opnd2}); in createWhileModel()