Searched defs:out_reg (Results 1 – 13 of 13) sorted by relevance
360 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local409 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local484 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local606 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local618 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local713 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); in CopyParameter() local737 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); in CopyParameter() local
266 uint32_t out_reg = inst->VRegA_22c(); in ProcessCodeItem() local296 uint32_t out_reg = is_jumbo ? inst->VRegA_31c() : inst->VRegA_21c(); in ProcessCodeItem() local324 uint32_t out_reg = inst->VRegA_21c(); in ProcessCodeItem() local440 uint32_t out_reg = inst->VRegA_22c(); in ProcessCodeItem() local454 uint32_t out_reg = inst->VRegA_22c(); in ProcessCodeItem() local469 uint32_t out_reg = inst->VRegA_21c(); in ProcessCodeItem() local
448 X86ManagedRegister out_reg = mout_reg.AsX86(); in CreateHandleScopeEntry() local489 X86ManagedRegister out_reg = mout_reg.AsX86(); in LoadReferenceFromHandleScope() local
497 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); in CreateHandleScopeEntry() local544 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); in LoadReferenceFromHandleScope() local
578 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); in CreateHandleScopeEntry() local625 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); in LoadReferenceFromHandleScope() local
495 vixl::aarch32::Register out_reg = AsVIXLRegister(mout_reg.AsArm()); in CreateHandleScopeEntry() local
4441 vixl32::Register out_reg = OutputRegister(rem); in VisitRem() local4749 vixl32::Register out_reg = RegisterFrom(locations->Out()); in VisitAbs() local5018 vixl32::Register out_reg = OutputRegister(op); in HandleShift() local8175 vixl32::Register out_reg = RegisterFrom(out); in VisitBitwiseNegatedRight() local8393 vixl32::Register out_reg = OutputRegister(instruction); in HandleBitwiseOperation() local8427 vixl32::Register out_reg = OutputRegister(instruction); in HandleBitwiseOperation() local8464 vixl32::Register out_reg = RegisterFrom(out); in GenerateReferenceLoadOneRegister() local8498 vixl32::Register out_reg = RegisterFrom(out); in GenerateReferenceLoadTwoRegisters() local
5497 Register out_reg = OutputRegister(abs); in VisitAbs() local5505 VRegister out_reg = OutputFPRegister(abs); in VisitAbs() local5912 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadOneRegister() local5952 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadTwoRegisters() local
7057 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadOneRegister() local7090 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadTwoRegisters() local
7786 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadOneRegister() local7819 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadTwoRegisters() local
467 vixl32::Register out_reg = OutputRegister(invoke); in VisitMathRoundFloat() local
605 Register out_reg = is_double ? XRegisterFrom(l->Out()) : WRegisterFrom(l->Out()); in GenMathRound() local
1456 for (size_t out_reg = 0; out_reg < num_outs; out_reg++) { in DumpVregLocations() local