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Searched refs:AsArm (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc93 if (reg.AsArm().IsCoreRegister()) { in BuildFrame()
94 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in BuildFrame()
96 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in BuildFrame()
123 CHECK(r0.Is(AsVIXLRegister(method_reg.AsArm()))); in BuildFrame()
130 ArmManagedRegister reg = spill.AsArm(); in BuildFrame()
157 if (reg.AsArm().IsCoreRegister()) { in RemoveFrame()
158 core_spill_mask |= 1u << reg.AsArm().AsCoreRegister(); in RemoveFrame()
160 fp_spill_mask |= 1u << reg.AsArm().AsSRegister(); in RemoveFrame()
236 ArmManagedRegister src = m_src.AsArm(); in Store()
259 vixl::aarch32::Register src = AsVIXLRegister(msrc.AsArm()); in StoreRef()
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Dmanaged_register_arm.h267 constexpr inline arm::ArmManagedRegister ManagedRegister::AsArm() const { in AsArm() function
Djni_macro_assembler_arm_vixl.h242 vixl32::Label* AsArm() { in AsArm() function
Dmanaged_register_arm_test.cc25 ArmManagedRegister reg = ManagedRegister::NoRegister().AsArm(); in TEST()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc104 if (r.AsArm().IsCoreRegister()) { in CalculateCoreCalleeSpillMask()
105 result |= (1u << r.AsArm().AsCoreRegister()); in CalculateCoreCalleeSpillMask()
115 if (r.AsArm().IsSRegister()) { in CalculateFpCalleeSpillMask()
116 result |= (1u << r.AsArm().AsSRegister()); in CalculateFpCalleeSpillMask()
/art/compiler/utils/
Dmanaged_register.h51 constexpr arm::ArmManagedRegister AsArm() const;