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Searched refs:D0 (Results 1 – 10 of 10) sorted by relevance

/art/compiler/utils/arm/
Dmanaged_register_arm_test.cc126 ArmManagedRegister reg = ArmManagedRegister::FromDRegister(D0); in TEST()
133 EXPECT_EQ(D0, reg.AsDRegister()); in TEST()
295 EXPECT_TRUE(!no_reg.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
303 EXPECT_TRUE(!reg_R0.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
311 EXPECT_TRUE(!reg_R1.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
321 EXPECT_TRUE(!reg_R8.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
332 EXPECT_TRUE(!reg_S0.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
342 EXPECT_TRUE(!reg_S1.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
352 EXPECT_TRUE(!reg_S31.Equals(ArmManagedRegister::FromDRegister(D0))); in TEST()
356 ArmManagedRegister reg_D0 = ArmManagedRegister::FromDRegister(D0); in TEST()
[all …]
Dconstants_arm.cc23 if (rhs >= D0 && rhs < kNumberOfDRegisters) { in operator <<()
Dconstants_arm.h63 D0 = 0, enumerator
/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc169 Arm64ManagedRegister reg = Arm64ManagedRegister::FromDRegister(D0); in TEST()
177 EXPECT_EQ(D0, reg.AsDRegister()); in TEST()
179 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
221 Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0); in TEST()
229 EXPECT_EQ(D0, reg.AsOverlappingDRegister()); in TEST()
276 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
285 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
292 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
301 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
308 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D0))); in TEST()
[all …]
/art/runtime/arch/arm64/
Dregisters_arm64.cc57 if (rhs >= D0 && rhs < kNumberOfDRegisters) { in operator <<()
Dcallee_save_frame_arm64.h62 (1 << art::arm64::D0) | (1 << art::arm64::D1) | (1 << art::arm64::D2) |
70 (1 << art::arm64::D0) | (1 << art::arm64::D1) | (1 << art::arm64::D2) |
Dregisters_arm64.h115 D0 = 0, enumerator
Dcontext_arm64.cc104 fprs_[D0] = nullptr; in SmashCallerSaves()
/art/compiler/jni/quick/arm64/
Dcalling_convention_arm64.cc42 D0, D1, D2, D3, D4, D5, D6, D7
158 return Arm64ManagedRegister::FromDRegister(D0); in ReturnRegisterForShorty()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc60 D0, D1, D2, D3, D4, D5, D6, D7
175 return ArmManagedRegister::FromDRegister(D0); in ReturnRegister()