Searched refs:D5 (Results 1 – 7 of 7) sorted by relevance
| /art/compiler/utils/arm/ |
| D | constants_arm.h | 68 D5 = 5, enumerator
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| /art/runtime/arch/arm64/ |
| D | callee_save_frame_arm64.h | 63 (1 << art::arm64::D3) | (1 << art::arm64::D4) | (1 << art::arm64::D5) |
71 (1 << art::arm64::D3) | (1 << art::arm64::D4) | (1 << art::arm64::D5) |
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| D | registers_arm64.h | 120 D5 = 5, enumerator
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| D | context_arm64.cc | 109 fprs_[D5] = nullptr; in SmashCallerSaves()
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| /art/compiler/jni/quick/arm64/ |
| D | calling_convention_arm64.cc | 42 D0, D1, D2, D3, D4, D5, D6, D7
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| /art/compiler/jni/quick/arm/ |
| D | calling_convention_arm.cc | 60 D0, D1, D2, D3, D4, D5, D6, D7
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| /art/compiler/utils/arm64/ |
| D | managed_register_arm64_test.cc | 233 dreg = Arm64ManagedRegister::FromDRegister(D5); in TEST()
241 EXPECT_EQ(D5, reg.AsOverlappingDRegister()); in TEST()
677 EXPECT_TRUE(vixl::aarch64::d5.Is(Arm64Assembler::reg_d(D5))); in TEST()
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