Searched refs:IP0 (Results 1 – 7 of 7) sorted by relevance
| /art/compiler/trampolines/ |
| D | trampoline_compiler.cc | 109 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
114 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
|
| /art/disassembler/ |
| D | disassembler_arm64.cc | 38 IP0 = 16, enumerator
|
| /art/runtime/arch/arm64/ |
| D | registers_arm64.h | 65 IP0 = X16, // Used as scratch by VIXL. enumerator
|
| /art/compiler/jni/quick/arm64/ |
| D | calling_convention_arm64.cc | 147 return Arm64ManagedRegister::FromXRegister(IP0); // X16 in InterproceduralScratchRegister()
151 return Arm64ManagedRegister::FromXRegister(IP0); // X16 in InterproceduralScratchRegister()
|
| /art/compiler/optimizing/ |
| D | intrinsics_arm64.cc | 202 DCHECK_NE(LocationFrom(src_curr_addr).reg(), IP0); in EmitNativeCode()
203 DCHECK_NE(LocationFrom(dst_curr_addr).reg(), IP0); in EmitNativeCode()
204 DCHECK_NE(LocationFrom(src_stop_addr).reg(), IP0); in EmitNativeCode()
205 DCHECK_NE(tmp_.reg(), IP0); in EmitNativeCode()
2730 DCHECK_NE(LocationFrom(tmp).reg(), IP0); in VisitSystemArrayCopy()
|
| D | code_generator_arm64.cc | 4645 assembler.JumpTo(ManagedRegister(arm64::X0), offset, ManagedRegister(arm64::IP0)); in EmitThunkCode()
4653 assembler.JumpTo(ManagedRegister(arm64::TR), offset, ManagedRegister(arm64::IP0)); in EmitThunkCode()
|
| /art/compiler/utils/arm64/ |
| D | managed_register_arm64_test.cc | 92 EXPECT_EQ(IP0, reg.AsXRegister()); in TEST()
628 EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0))); in TEST()
|