Searched refs:mem_op (Results 1 – 2 of 2) sorted by relevance
| /art/compiler/optimizing/ |
| D | common_arm64.h | 214 const vixl::aarch64::MemOperand& mem_op) { in OperandFromMemOperand() argument
215 if (mem_op.IsImmediateOffset()) { in OperandFromMemOperand()
216 return vixl::aarch64::Operand(mem_op.GetOffset()); in OperandFromMemOperand()
218 DCHECK(mem_op.IsRegisterOffset()); in OperandFromMemOperand()
219 if (mem_op.GetExtend() != vixl::aarch64::NO_EXTEND) { in OperandFromMemOperand()
220 return vixl::aarch64::Operand(mem_op.GetRegisterOffset(), in OperandFromMemOperand()
221 mem_op.GetExtend(), in OperandFromMemOperand()
222 mem_op.GetShiftAmount()); in OperandFromMemOperand()
223 } else if (mem_op.GetShift() != vixl::aarch64::NO_SHIFT) { in OperandFromMemOperand()
224 return vixl::aarch64::Operand(mem_op.GetRegisterOffset(), in OperandFromMemOperand()
[all …]
|
| D | intrinsics_arm64.cc | 768 MemOperand mem_op(base.X(), offset); in GenUnsafeGet() local
770 codegen->LoadAcquire(invoke, trg, mem_op, /* needs_null_check= */ true); in GenUnsafeGet()
772 codegen->Load(type, trg, mem_op); in GenUnsafeGet()
892 MemOperand mem_op(base.X(), offset); in GenUnsafePut() local
908 codegen->StoreRelease(invoke, type, source, mem_op, /* needs_null_check= */ false); in GenUnsafePut()
910 codegen->Store(type, source, mem_op); in GenUnsafePut()
|