Searched refs:op2 (Results 1 – 5 of 5) sorted by relevance
/art/test/1978-regular-obsolete-then-structural-obsolescence/ |
D | expected.txt | 5 Not doing anything here - op2 6 Running after op2 using normal definition 13 Running after op2 using structural redefinition 17 Running after op2 using structural redefinition 19 Not doing anything here - op2 20 Running after op2 using structural redefinition
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/art/compiler/optimizing/ |
D | codegen_test.cc | 622 HInstruction* op2; in TestComparison() local 625 op2 = graph->GetIntConstant(j); in TestComparison() 629 op2 = graph->GetLongConstant(j); in TestComparison() 638 comparison = new (GetAllocator()) HEqual(op1, op2); in TestComparison() 642 comparison = new (GetAllocator()) HNotEqual(op1, op2); in TestComparison() 646 comparison = new (GetAllocator()) HLessThan(op1, op2); in TestComparison() 650 comparison = new (GetAllocator()) HLessThanOrEqual(op1, op2); in TestComparison() 654 comparison = new (GetAllocator()) HGreaterThan(op1, op2); in TestComparison() 658 comparison = new (GetAllocator()) HGreaterThanOrEqual(op1, op2); in TestComparison() 662 comparison = new (GetAllocator()) HBelow(op1, op2); in TestComparison() [all …]
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D | code_generator_x86_64.cc | 4091 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenerateMinMaxInt() local 4100 __ cmpq(out, op2); in GenerateMinMaxInt() 4101 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ true); in GenerateMinMaxInt() 4104 __ cmpl(out, op2); in GenerateMinMaxInt() 4105 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ false); in GenerateMinMaxInt() 4140 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP() local 4144 __ ucomisd(out, op2); in GenerateMinMaxFP() 4147 __ ucomiss(out, op2); in GenerateMinMaxFP() 4158 __ orpd(out, op2); in GenerateMinMaxFP() 4160 __ orps(out, op2); in GenerateMinMaxFP() [all …]
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D | code_generator_x86.cc | 4049 Register op2 = op2_loc.AsRegister<Register>(); in GenerateMinMaxInt() local 4057 __ cmpl(out, op2); in GenerateMinMaxInt() 4059 __ cmovl(cond, out, op2); in GenerateMinMaxInt() 4094 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP() local 4098 __ ucomisd(out, op2); in GenerateMinMaxFP() 4101 __ ucomiss(out, op2); in GenerateMinMaxFP() 4112 __ orpd(out, op2); in GenerateMinMaxFP() 4114 __ orps(out, op2); in GenerateMinMaxFP() 4118 __ andpd(out, op2); in GenerateMinMaxFP() 4120 __ andps(out, op2); in GenerateMinMaxFP() [all …]
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D | code_generator_arm_vixl.cc | 4522 vixl32::Register op2 = RegisterFrom(op2_loc); in GenerateMinMaxInt() local 4525 __ Cmp(op1, op2); in GenerateMinMaxInt() 4534 __ mov(is_min ? ge : le, out, op2); in GenerateMinMaxInt() 4590 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenerateMinMaxFloat() local 4601 __ Vcmp(op1, op2); in GenerateMinMaxFloat() 4612 __ vmov(cond, F32, out, op2); in GenerateMinMaxFloat() 4619 __ Vmov(temp2, op2); in GenerateMinMaxFloat() 4651 vixl32::DRegister op2 = DRegisterFrom(op2_loc); in GenerateMinMaxDouble() local 4658 __ Vcmp(op1, op2); in GenerateMinMaxDouble() 4669 __ vmov(cond, F64, out, op2); in GenerateMinMaxDouble() [all …]
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