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Searched refs:op2_loc (Results 1 – 3 of 3) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc4518 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4522 vixl32::Register op2 = RegisterFrom(op2_loc); in GenerateMinMaxInt()
4540 Location op2_loc = locations->InAt(1); in GenerateMinMaxLong() local
4544 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxLong()
4551 vixl32::Register op2_lo = LowRegisterFrom(op2_loc); in GenerateMinMaxLong()
4552 vixl32::Register op2_hi = HighRegisterFrom(op2_loc); in GenerateMinMaxLong()
4580 Location op2_loc = locations->InAt(1); in GenerateMinMaxFloat() local
4584 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFloat()
4590 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenerateMinMaxFloat()
4641 Location op2_loc = locations->InAt(1); in GenerateMinMaxDouble() local
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Dcode_generator_x86.cc4011 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4014 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4029 Register op2_lo = op2_loc.AsRegisterPairLow<Register>(); in GenerateMinMaxInt()
4030 Register op2_hi = op2_loc.AsRegisterPairHigh<Register>(); in GenerateMinMaxInt()
4049 Register op2 = op2_loc.AsRegister<Register>(); in GenerateMinMaxInt()
4067 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4072 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4094 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()
Dcode_generator_x86_64.cc4079 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4082 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4091 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenerateMinMaxInt()
4113 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4118 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4140 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()