/art/runtime/interpreter/mterp/x86/ |
D | control_flow.S | 13 sarl $$4, rINST # rINST <- B 14 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 16 movswl 2(rPC), rINST # Get signed branch offset 17 testl rINST, rINST 33 cmpl $$0, VREG_ADDRESS(rINST) # compare (vA, 0) 35 movswl 2(rPC), rINST # fetch signed displacement 36 testl rINST, rINST 51 movsbl rINSTbl, rINST # rINST <- ssssssAA 52 testl rINST, rINST 63 movswl 2(rPC), rINST # rINST <- ssssAAAA [all …]
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D | other.S | 10 movl rINST, OUT_ARG1(%esp) 30 SET_VREG %eax, rINST # vAA<- eax 36 SET_VREG %ecx, rINST # vAA <- ssssBBBB 42 movl $$0xf, rINST 43 andl %eax, rINST # rINST <- A 45 SET_VREG %eax, rINST 55 SET_VREG %eax, rINST # vAA <- eax 72 movl rINST, OUT_ARG1(%esp) 87 movl 6(rPC), rINST # rINST <- msw 89 SET_VREG_HIGH rINST, %ecx [all …]
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D | arithmetic.S | 49 SET_VREG $result, rINST 63 andb $$0xf, rINSTbl # rINST <- A 64 GET_VREG %eax, rINST # eax <- vBB 72 SET_VREG $result, rINST 81 SET_VREG $result, rINST 96 andb $$0xf, rINSTbl # rINST <- A 104 SET_VREG %eax, rINST 111 SET_VREG $result, rINST 131 SET_VREG %eax, rINST 138 SET_VREG $result, rINST [all …]
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D | floating_point.S | 34 SET_VREG %eax, rINST 43 sarl $$4, rINST # rINST <- B 44 $load VREG_ADDRESS(rINST) # %st0 <- vB 61 SET_VREG_XMM${suff} %xmm0, rINST # vAA <- %xmm0 63 vmovs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 66 SET_VREG_XMM${suff} %xmm0, rINST # vAA <- %xmm0 68 movs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 76 sarl $$4, rINST # rINST<- B 78 v${instr}${suff} VREG_ADDRESS(rINST), %xmm0, %xmm0 81 vmovs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref [all …]
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D | object.S | 6 REFRESH_INST ${opnum} # fix rINST to include opcode 8 movl rINST, OUT_ARG1(%esp) # arg1: uint16_t inst_data 27 leal VREG_ADDRESS(rINST), %ecx 92 andb $$0xf,rINSTbl # rINST <- A 93 SET_VREG %eax, rINST # fp[A] <- value 191 andb $$0xf, rINSTbl # rINST <- A 192 GET_VREG rINST, rINST # rINST <- v[A]
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D | array.S | 18 SET_VREG %eax, rINST 49 SET_VREG_OBJECT %eax, rINST 70 SET_WIDE_FP_VREG %xmm0, rINST # vAA <- xmm0 90 GET_VREG rINST, rINST 113 movl rINST, OUT_ARG2(%esp) 138 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- vAA 146 mov rINST, %eax # eax <- BA 147 sarl $$4, rINST # rINST <- B 148 GET_VREG %ecx, rINST # ecx <- vB (object ref) 152 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST [all …]
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D | invoke.S | 15 movl rINST, OUT_ARG3(%esp) 41 movl rINST, OUT_ARG3(%esp)
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/art/runtime/interpreter/mterp/arm/ |
D | other.S | 9 mov r1, rINST, lsr #8 @ r1<- AA 13 PREFETCH_INST 2 @ load rINST 17 GET_INST_OPCODE ip @ extract opcode from rINST 28 mov r3, rINST, lsr #8 @ r3<- AA 31 FETCH_ADVANCE_INST 3 @ advance rPC, load rINST 33 GET_INST_OPCODE ip @ extract opcode from rINST 40 mov r3, rINST, lsr #8 @ r3<- AA 41 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 43 GET_INST_OPCODE ip @ extract opcode from rINST 48 sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended) [all …]
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D | arithmetic.S | 19 mov r9, rINST, lsr #8 @ r9<- AA 29 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 32 GET_INST_OPCODE ip @ extract opcode from rINST 53 mov r3, rINST, lsr #12 @ r3<- B 54 ubfx r9, rINST, #8, #4 @ r9<- A 61 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST 65 GET_INST_OPCODE ip @ extract opcode from rINST 85 mov r2, rINST, lsr #12 @ r2<- B 86 ubfx r9, rINST, #8, #4 @ r9<- A 92 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST [all …]
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D | control_flow.S | 9 mov r1, rINST, lsr #12 @ r1<- B 10 ubfx r0, rINST, #8, #4 @ r0<- A 13 FETCH_S rINST, 1 @ rINST<- branch offset, in code units 19 GET_INST_OPCODE ip @ extract opcode from rINST 30 mov r0, rINST, lsr #8 @ r0<- AA 32 FETCH_S rINST, 1 @ rINST<- branch offset, in code units 38 GET_INST_OPCODE ip @ extract opcode from rINST 49 sbfx rINST, rINST, #8, #8 @ rINST<- ssssssAA (sign-extended) 60 FETCH_S rINST, 1 @ rINST<- ssssAAAA (sign-extended) 78 orrs rINST, r0, r3, lsl #16 @ rINST<- AAAAaaaa [all …]
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D | object.S | 7 mov r1, rINST @ arg1: uint16_t inst_data 15 GET_INST_OPCODE ip @ extract opcode from rINST 25 mov r1, rINST, lsr #8 @ r1<- AA 34 GET_INST_OPCODE ip @ extract opcode from rINST 43 mov r2, rINST, lsr #12 @ B 117 ubfx r2, rINST, #8, #4 @ r2<- A 123 GET_INST_OPCODE ip @ extract opcode from rINST 129 mov r2, rINST, lsr #12 @ r2<- B 155 ubfx r2, rINST, #8, #4 @ r2<- A 159 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST [all …]
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D | array.S | 15 mov r9, rINST, lsr #8 @ r9<- AA 25 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 27 GET_INST_OPCODE ip @ extract opcode from rINST 48 mov r9, rINST, lsr #8 @ r9<- AA 74 mov r9, rINST, lsr #8 @ r9<- AA 85 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 89 GET_INST_OPCODE ip @ extract opcode from rINST 107 mov r9, rINST, lsr #8 @ r9<- AA 117 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 119 GET_INST_OPCODE ip @ extract opcode from rINST [all …]
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D | floating_point.S | 11 mov r9, rINST, lsr #8 @ r9<- AA 19 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST 21 GET_INST_OPCODE ip @ extract opcode from rINST 34 mov r3, rINST, lsr #12 @ r3<- B 35 ubfx r9, rINST, #8, #4 @ r9<- A 39 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST 42 GET_INST_OPCODE ip @ extract opcode from rINST
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D | main.S | 101 #define rINST r7 macro 148 ldrh rINST, [rPC] 164 ldrh rINST, [rPC, #((\count)*2)]! 181 ldrh rINST, [rPC, #((\count)*2)] 200 ldrh rINST, [rPC, \reg]! 230 and \reg, rINST, #255 425 FETCH_INST @ load rINST from rPC 426 GET_INST_OPCODE ip @ extract opcode from rINST 593 cmp rINST, #0 691 mov r2, rINST [all …]
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D | invoke.S | 12 mov r3, rINST 35 mov r3, rINST
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/art/runtime/interpreter/mterp/x86_64/ |
D | arithmetic.S | 66 movl rINST, %ecx # rcx <- BA 68 andb $$0xf, rINSTbl # rINST <- A 128 movl rINST, %eax # rax <- 000000BA 132 andb $$0xf, rINSTbl # rINST <- A 226 movl rINST, %ecx # rcx <- A+ 227 sarl $$4, rINST # rINST <- B 245 movl rINST, %eax # rax <- 000000BA 248 andb $$0xf, rINSTbl # rINST <- A 290 movl rINST, %ecx # rcx <- A+ 291 sarl $$4, rINST # rINST <- B [all …]
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D | floating_point.S | 42 movl rINST, %ecx # rcx <- A+ 43 sarl $$4, rINST # rINST <- B 73 movl rINST, %ecx # ecx <- A+ 76 sarl $$4, rINST # rINST<- B 193 sarl $$4, rINST # rINST <- B 226 sarl $$4, rINST # rINST <- B
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D | other.S | 38 movl $$0xf, rINST 39 andl %eax, rINST # rINST <- A 143 movl rINST, %eax # eax <- BA 145 shrl $$4, rINST # rINST <- B 221 movl rINST, %ecx # ecx <- BA 222 sarl $$4, rINST # rINST <- B
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D | array.S | 79 GET_VREG rINST, rINSTq 118 movl rINST, %eax # eax <- BA 119 sarl $$4, rINST # rINST <- B 124 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST 125 SET_VREG rINST, %rax
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D | object.S | 6 REFRESH_INST ${opnum} # fix rINST to include opcode 8 movl rINST, OUT_32_ARG1 # arg1: uint16_t inst_data 81 andb $$0xf,rINSTbl # rINST <- A 113 movl rINST, %eax # eax <- BA 156 movl rINST, OUT_32_ARG2 194 andb $$0xf, rINSTbl # rINST<- A
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D | invoke.S | 13 movl rINST, OUT_32_ARG3 36 movl rINST, OUT_32_ARG3
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/art/runtime/interpreter/mterp/x86_64ng/ |
D | object.S | 27 movl rINST, %ecx # rcx <- BA 53 andb $$0xf,rINSTbl # rINST <- A 131 andb $$0xf, rINSTbl # rINST <- A 132 GET_VREG rINST, rINSTq # rINST <- v[A]
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D | other.S | 19 andl MACRO_LITERAL(0xf), rINST # rINST <- A 124 movl rINST, %eax # eax <- BA 126 shrl $$4, rINST # rINST <- B 197 movl rINST, %ecx # ecx <- BA 198 sarl $$4, rINST # rINST <- B
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D | array.S | 75 GET_VREG rINST, rINSTq 112 movl rINST, %eax # eax <- BA 113 sarl $$4, rINST # rINST <- B 118 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST 119 SET_VREG rINST, %rax
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D | control_flow.S | 10 movl rINST, %ecx # rcx <- A+ 11 sarl $$4, rINST # rINST <- B
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