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Searched refs:st1 (Results 1 – 7 of 7) sorted by relevance

/frameworks/opt/telephony/tests/telephonytests/src/com/android/internal/telephony/
DSignalThresholdInfoTest.java114 SignalThresholdInfo st1 = new SignalThresholdInfo(1, HYSTERESIS_MS, HYSTERESIS_DB, in testEqualsSignalThresholdInfo() local
124 assertTrue(st1.equals(st1)); in testEqualsSignalThresholdInfo()
125 assertFalse(st1.equals(st2)); in testEqualsSignalThresholdInfo()
126 assertFalse(st1.equals(st3)); in testEqualsSignalThresholdInfo()
127 assertTrue(st1.equals(st4)); in testEqualsSignalThresholdInfo()
129 assertFalse(st1.equals(new String("test"))); in testEqualsSignalThresholdInfo()
/frameworks/rs/cpu_ref/
DrsCpuIntrinsics_advsimd_Resize.S158 st1 {v8.1d - v11.1d}, [sp]
159 st1 {v12.1d - v15.1d}, [x8]
216 st1 {v11.4h,v12.4h}, [x12]
218 st1 {v12.4h}, [x15]
222 st1 {v11.8h,v12.8h}, [x12]
224 st1 {v12.8h}, [x15]
230 st1 {v12.8h,v13.8h}, [x12], #32
231 st1 {v14.8h,v15.8h}, [x12]
234 st1 {v11.8h,v12.8h}, [x15]
280 st1 {v12.8h}, [x12], #16
[all …]
DrsCpuIntrinsics_advsimd_YuvToRGB.S288 st1 {v2.16b,v3.16b}, [x0], #32
290 st1 {v1.16b}, [x0], #16
292 st1 {v0.d}[1], [x0], #8
294 st1 {v0.s}[1], [x0], #4
317 st1 {v8.1d - v11.1d}, [sp]
318 st1 {v12.1d - v15.1d}, [x6]
343 st1 {v8.1d - v11.1d}, [sp]
344 st1 {v12.1d - v15.1d}, [x5]
369 st1 {v8.1d - v11.1d}, [sp]
370 st1 {v12.1d - v15.1d}, [x5]
DrsCpuIntrinsics_advsimd_Convolve.S32 st1 {v8.1d-v11.1d}, [x6], #32
33 st1 {v12.1d-v15.1d}, [x6]
89 st1 {v8.8b}, [x0], #8
117 st1 {v8.1d-v11.1d}, [x8], #32
118 st1 {v12.1d-v15.1d}, [x8]
254 st1 {v4.8b}, [x0], #8 // return the output and increase the address of x0
DrsCpuIntrinsics_advsimd_ColorMatrix.S529 st1 {v12.8b}, [x0], #8
546 st1 {v24.8b}, [x0], #8
587 st1 {v8.4s}, [x0], #16
589 st1 {v16.4s}, [x0], #16
601 st1 {v12.s}[1], [x0], #4
603 st1 {v12.h}[1], [x0], #2
605 st1 {v12.b}[1], [x0], #1
613 st1 {v12.d}[1], [x0], #8
615 st1 {v12.s}[1], [x0], #4
617 st1 {v12.h}[1], [x0], #2
[all …]
DrsCpuIntrinsics_advsimd_Blend.S439 st1 {v8.1d - v11.1d}, [sp]
440 st1 {v12.1d - v15.1d}, [x3]
472 st1 {v0.16b,v1.16b,v2.16b,v3.16b}, [x0], #64
555 st1 {v2.16b,v3.16b}, [x0], #32
557 st1 {v1.16b}, [x0], #16
559 st1 {v0.d}[1], [x0], #8
561 st1 {v0.s}[1], [x0], #4
563 st1 {v0.h}[1], [x0], #2
565 st1 {v0.b}[1], [x0], #1
DrsCpuIntrinsics_advsimd_Blur.S1154 st1 {v17.16b}, [x9], #16
1212 st1 {v8.8h, v9.8h, v10.8h,v11.8h}, [sp]
1233 st1 {v8.8h, v9.8h, v10.8h,v11.8h}, [sp]
1262 st1 {v10.8h,v11.8h,v12.8h,v13.8h}, [sp]
1289 st1 {v10.8h,v11.8h,v12.8h,v13.8h}, [sp]
1314 st1 {v10.8h,v11.8h}, [sp]
1318 st1 {v12.8h,v13.8h}, [x12]
1332 st1 {v10.8h,v11.8h}, [sp]
1335 st1 {v13.8h}, [x12]
1361 st1 {\sra,\srb}, [x9], #32
[all …]