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Searched refs:bits (Results 1 – 25 of 26) sorted by relevance

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/art/test/708-jit-cache-churn/src/
DJitCacheChurnTest.java137 int bits = i; in $noinline$Call() local
138 bits = ((bits >>> 1) & 0x55555555) | ((bits << 1) & 0x55555555); in $noinline$Call()
139 bits = ((bits >>> 2) & 0x33333333) | ((bits << 2) & 0x33333333); in $noinline$Call()
140 bits = ((bits >>> 4) & 0x0f0f0f0f) | ((bits << 4) & 0x0f0f0f0f); in $noinline$Call()
141 bits = ((bits >>> 8) & 0x00ff00ff) | ((bits << 8) & 0x00ff00ff); in $noinline$Call()
142 bits = (bits >>> 16) | (bits << 16); in $noinline$Call()
143 sum += bits; in $noinline$Call()
/art/libartbase/base/
Dbit_utils_iterator.h44 explicit BitIteratorBase(T bits) : bits_(bits) { } in BitIteratorBase() argument
100 IterationRange<LowToHighBitIterator<T>> LowToHighBits(T bits) { in LowToHighBits() argument
102 LowToHighBitIterator<T>(bits), LowToHighBitIterator<T>()); in LowToHighBits()
106 IterationRange<HighToLowBitIterator<T>> HighToLowBits(T bits) { in HighToLowBits() argument
108 HighToLowBitIterator<T>(bits), HighToLowBitIterator<T>()); in HighToLowBits()
Dbit_utils.h258 constexpr T GetIntLimit(size_t bits) { in GetIntLimit() argument
259 DCHECK_NE(bits, 0u); in GetIntLimit()
260 DCHECK_LT(bits, BitSizeOf<T>()); in GetIntLimit()
261 return static_cast<T>(1) << (bits - 1); in GetIntLimit()
305 constexpr T MaxInt(size_t bits) { in MaxInt() argument
306 DCHECK(std::is_unsigned<T>::value || bits > 0u) << "bits cannot be zero for signed."; in MaxInt()
307 DCHECK_LE(bits, BitSizeOf<T>()); in MaxInt()
309 return bits == BitSizeOf<T>() in MaxInt()
312 ? ((bits == 1u) ? 0 : static_cast<T>(MaxInt<unsigned_type>(bits - 1))) in MaxInt()
313 : static_cast<T>(UINT64_C(1) << bits) - static_cast<T>(1); in MaxInt()
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Dbit_vector_test.cc71 uint32_t bits[kWords]; in TEST() local
72 memset(bits, 0, sizeof(bits)); in TEST()
74 BitVector bv(false, Allocator::GetNoopAllocator(), kWords, bits); in TEST()
77 EXPECT_EQ(bits, bv.GetRawStorage()); in TEST()
128 uint32_t bits[kWords]; in TEST() local
129 memset(bits, 0, sizeof(bits)); in TEST()
131 BitVector bv(false, Allocator::GetNoopAllocator(), kWords, bits); in TEST()
Dstats.h35 void AddBits(double bits, size_t count = 1) { Add(bits / kBitsPerByte, count); }
Dbit_vector.h132 static constexpr uint32_t BitsToWords(uint32_t bits) { in BitsToWords() argument
133 return RoundUp(bits, kWordBits) / kWordBits; in BitsToWords()
/art/test/660-store-8-16/
Dinfo.txt2 used to crash on 8bits / 16bits immediate stores when the Java
/art/runtime/
Dart_field-inl.h248 JValue bits; in GetFloat() local
249 bits.SetI(Get32(object)); in GetFloat()
250 return bits.GetF(); in GetFloat()
256 JValue bits; in SetFloat() local
257 bits.SetF(f); in SetFloat()
258 Set32<kTransactionActive>(object, bits.GetI()); in SetFloat()
263 JValue bits; in GetDouble() local
264 bits.SetJ(Get64(object)); in GetDouble()
265 return bits.GetD(); in GetDouble()
271 JValue bits; in SetDouble() local
[all …]
Dstack_map.cc201 uint32_t bits = mask.LoadBits(reg, std::min<uint32_t>(end - reg, kNumBits)); in DecodeDexRegisterMap() local
202 while (bits != 0) { in DecodeDexRegisterMap()
203 uint32_t bit = CTZ(bits); in DecodeDexRegisterMap()
209 bits ^= 1u << bit; // Clear the bit. in DecodeDexRegisterMap()
291 BitMemoryRegion bits = table.GetBitMemoryRegion(r, c); in Dump() local
292 for (size_t b = 0, e = bits.size_in_bits(); b < e; b++) { in Dump()
293 vios->Stream() << bits.LoadBit(e - b - 1); in Dump()
/art/tools/hiddenapi/
DREADME.md31 Two bits of information are encoded in the DEX access flags. These are encoded
35 First bit is encoded as the inversion of visibility access flags (bits 2:0).
36 At most one of these flags can be set at any given time. Inverting these bits
37 therefore produces a value where at least two bits are set and there is never
42 LEB128 encoding. The following bits are used:
/art/test/577-checker-fp2int/
Dinfo.txt1 Unit test for float/double to raw bits conversions.
/art/test/436-shift-constant/
Dinfo.txt1 Regression tests for shift instructions and constants larger than 8bits.
/art/test/583-checker-zero/
Dinfo.txt1 Regression test for optimizing that used to think 0.0 has the same bits
/art/test/419-long-parameter/
Dinfo.txt2 on 32bits architectures. The move to hard float ABI makes it so that the
/art/build/apex/
Dart_apex_test.py130 bits = comps[2]
135 if len(bits) != 6:
136 logging.warning('Dont understand bits \'%s\'', bits)
138 is_dir = bits[1] == '4'
143 is_exec = is_exec_bit(bits[3]) and is_exec_bit(bits[4]) and is_exec_bit(bits[5])
144 is_symlink = bits[1] == '2'
239 bits = (zipinfo.external_attr >> 16) & 0xFFFF
240 is_dir = get_octal(bits, 4) == 4
241 is_symlink = get_octal(bits, 4) == 2
242 is_exec = bits_is_exec(bits)
/art/test/670-bitstring-type-check/
Dbuild57 // less bits for the level 1 character. 1025 classes at level 2 similarly guarantees
58 // an overflow if the number of bits for level 2 character is 10 or less. To test
/art/libdexfile/dex/
Ddex_file_verifier_test.cc810 uint32_t bits = POPCOUNT(kInterfaceDisallowed); in TEST_F() local
811 for (uint32_t i = 1; i < (1u << bits); ++i) { in TEST_F()
960 uint32_t bits = POPCOUNT(kAccFlags); in TEST_F() local
961 for (uint32_t j = 1; j < (1u << bits); ++j) { in TEST_F()
1170 uint32_t bits = POPCOUNT(kInterfaceDisallowed); in TEST_F() local
1171 for (uint32_t i = 1; i < (1u << bits); ++i) { in TEST_F()
/art/runtime/interpreter/mterp/x86_64ng/
Dother.S6 movl 2(rPC), %eax # grab all 32 bits at once
/art/test/510-checker-try-catch/smali/
DRuntime.smali60 # The sum of the low and high 32 bits treated as integers is returned to prove
253 # to the location of the catch phi. The sum of the low and high 32 bits treated
347 # Values were chosen so that all 64 bits are used.
439 # and returned. Values were chosen so that all 64 bits are used.
/art/runtime/interpreter/mterp/x86_64/
Dother.S25 movl 2(rPC), %eax # grab all 32 bits at once
/art/runtime/interpreter/mterp/arm/
Dobject.S158 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
/art/runtime/interpreter/mterp/x86/
Dother.S29 movl 2(rPC), %eax # grab all 32 bits at once
/art/runtime/arch/arm/
Dquick_entrypoints_arm.S567 @ (thread id, count of 0 and preserved read barrier bits),
570 ands ip, r2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits.
572 @ unlocked case - store r3: original lock word plus thread id, preserved read barrier bits.
583 cbnz r3, .Lslow_lock @ if either of the top two bits are set, or the lock word's
653 strex r2, r3, [r0, #MIRROR_OBJECT_LOCK_WORD_OFFSET] @ strex necessary for read barrier bits.
/art/compiler/optimizing/
Dintrinsics_arm64.cc3224 Register bits = InputRegisterAt(invoke, 0); in VisitFP16ToFloat() local
3227 __ Fmov(half, bits); // ARMv8.2 in VisitFP16ToFloat()
Dnodes.h5236 S bits = bit_cast<S, T>(x); in ComputeFP() local
5237 return bit_cast<T, S>(bits & std::numeric_limits<S>::max()); in ComputeFP()

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