167       __m256 vacc01234567p0 = _mm256_load_ps(w);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()  local
174       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
186       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
198       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
210       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
222       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
234       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi10x01234567, vk10x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
246       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi12x01234567, vk12x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
258       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi14x01234567, vk14x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
270       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi16x01234567, vk16x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
282       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi18x01234567, vk18x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
294       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi20x01234567, vk20x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
306       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi22x01234567, vk22x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
318       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi24x01234567, vk24x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
323       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
325       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
336       __m256 vacc01234567p0 = _mm256_load_ps(w);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()  local
340       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
348       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
356       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
364       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
372       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
380       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi10x01234567, vk10x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
388       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi12x01234567, vk12x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
396       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi14x01234567, vk14x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
404       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi16x01234567, vk16x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
412       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi18x01234567, vk18x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
420       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi20x01234567, vk20x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
428       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi22x01234567, vk22x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
436       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi24x01234567, vk24x01234567));  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
439       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()
441       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);  in xnn_f32_dwconv_minmax_ukernel_up8x25__avx_acc2()