Lines Matching refs:__m128
34 const __m128 vmask_even = _mm_load_ps((const float*) params->sse.mask_even); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
35 const __m128 vmask_odd = _mm_load_ps((const float*) params->sse.mask_odd); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
36 const __m128 vmax = _mm_load_ps(params->sse.max); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
37 const __m128 vmin = _mm_load_ps(params->sse.min); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
39 const __m128 vbias = _mm_load1_ps(weights); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
40 const __m128 vk00 = _mm_load1_ps(weights + 1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
41 const __m128 vk01 = _mm_load1_ps(weights + 2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
42 const __m128 vk02 = _mm_load1_ps(weights + 3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
43 const __m128 vk03 = _mm_load1_ps(weights + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
44 const __m128 vk04 = _mm_load1_ps(weights + 5); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
45 const __m128 vk10 = _mm_load1_ps(weights + 6); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
46 const __m128 vk11 = _mm_load1_ps(weights + 7); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
47 const __m128 vk12 = _mm_load1_ps(weights + 8); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
48 const __m128 vk13 = _mm_load1_ps(weights + 9); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
49 const __m128 vk14 = _mm_load1_ps(weights + 10); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
50 const __m128 vk20 = _mm_load1_ps(weights + 11); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
51 const __m128 vk21 = _mm_load1_ps(weights + 12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
52 const __m128 vk22 = _mm_load1_ps(weights + 13); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
53 const __m128 vk23 = _mm_load1_ps(weights + 14); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
54 const __m128 vk24 = _mm_load1_ps(weights + 15); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
55 const __m128 vk30 = _mm_load1_ps(weights + 16); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
56 const __m128 vk31 = _mm_load1_ps(weights + 17); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
57 const __m128 vk32 = _mm_load1_ps(weights + 18); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
58 const __m128 vk33 = _mm_load1_ps(weights + 19); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
59 const __m128 vk34 = _mm_load1_ps(weights + 20); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
60 const __m128 vk40 = _mm_load1_ps(weights + 21); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
61 const __m128 vk41 = _mm_load1_ps(weights + 22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
62 const __m128 vk42 = _mm_load1_ps(weights + 23); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
63 const __m128 vk43 = _mm_load1_ps(weights + 24); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
64 const __m128 vk44 = _mm_load1_ps(weights + 25); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
91 __m128 vi0x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
92 __m128 vi1x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
93 __m128 vi2x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
94 __m128 vi3x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
95 __m128 vi4x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
97 __m128 vi0x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
98 __m128 vi1x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
99 __m128 vi2x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
100 __m128 vi3x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
101 __m128 vi4x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
103 const __m128 vi0x89AB = _mm_loadu_ps(i0); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
104 const __m128 vi0xCDEF = _mm_loadu_ps(i0 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
106 const __m128 vi1x89AB = _mm_loadu_ps(i1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
107 const __m128 vi1xCDEF = _mm_loadu_ps(i1 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
109 const __m128 vi2x89AB = _mm_loadu_ps(i2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
110 const __m128 vi2xCDEF = _mm_loadu_ps(i2 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
112 const __m128 vi3x89AB = _mm_loadu_ps(i3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
113 const __m128 vi3xCDEF = _mm_loadu_ps(i3 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
115 const __m128 vi4x89AB = _mm_loadu_ps(i4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
116 const __m128 vi4xCDEF = _mm_loadu_ps(i4 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
119 __m128 vi0x8ACE = _mm_shuffle_ps(vi0x89AB, vi0xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
120 __m128 vi0x9BDF = _mm_shuffle_ps(vi0x89AB, vi0xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
121 __m128 vi1x8ACE = _mm_shuffle_ps(vi1x89AB, vi1xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
122 __m128 vi1x9BDF = _mm_shuffle_ps(vi1x89AB, vi1xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
123 __m128 vi2x8ACE = _mm_shuffle_ps(vi2x89AB, vi2xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
124 __m128 vi2x9BDF = _mm_shuffle_ps(vi2x89AB, vi2xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
125 __m128 vi3x8ACE = _mm_shuffle_ps(vi3x89AB, vi3xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
126 __m128 vi3x9BDF = _mm_shuffle_ps(vi3x89AB, vi3xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
127 __m128 vi4x8ACE = _mm_shuffle_ps(vi4x89AB, vi4xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
128 __m128 vi4x9BDF = _mm_shuffle_ps(vi4x89AB, vi4xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
132 __m128 vo0p0 = _mm_add_ps(vbias, _mm_mul_ps(vi0x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
133 __m128 vo0p1 = _mm_mul_ps(vi1x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
134 __m128 vo0p2 = _mm_mul_ps(vi2x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
135 __m128 vo0p3 = _mm_mul_ps(vi3x8ACE, vk32); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
138 const __m128 vi0xE8AC = _mm_shuffle_ps(vi0x8ACE, vi0x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
139 const __m128 vi1xE8AC = _mm_shuffle_ps(vi1x8ACE, vi1x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
140 const __m128 vi2xE8AC = _mm_shuffle_ps(vi2x8ACE, vi2x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
141 const __m128 vi3xE8AC = _mm_shuffle_ps(vi3x8ACE, vi3x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
142 const __m128 vi4xE8AC = _mm_shuffle_ps(vi4x8ACE, vi4x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
150 const __m128 vi0x68AC = _mm_move_ss(vi0xE8AC, vi0x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
152 const __m128 vi1x68AC = _mm_move_ss(vi1xE8AC, vi1x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
154 const __m128 vi2x68AC = _mm_move_ss(vi2xE8AC, vi2x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
156 const __m128 vi3x68AC = _mm_move_ss(vi3xE8AC, vi3x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
158 const __m128 vi4x68AC = _mm_move_ss(vi4xE8AC, vi4x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
161 const __m128 vi0xF9BD = _mm_shuffle_ps(vi0x9BDF, vi0x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
162 const __m128 vi1xF9BD = _mm_shuffle_ps(vi1x9BDF, vi1x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
163 const __m128 vi2xF9BD = _mm_shuffle_ps(vi2x9BDF, vi2x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
164 const __m128 vi3xF9BD = _mm_shuffle_ps(vi3x9BDF, vi3x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
165 const __m128 vi4xF9BD = _mm_shuffle_ps(vi4x9BDF, vi4x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
173 const __m128 vi0xGHIJ = _mm_loadu_ps(i0); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
174 const __m128 vi0xKLMN = _mm_loadu_ps(i0 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
176 const __m128 vi1xGHIJ = _mm_loadu_ps(i1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
177 const __m128 vi1xKLMN = _mm_loadu_ps(i1 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
179 const __m128 vi2xGHIJ = _mm_loadu_ps(i2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
180 const __m128 vi2xKLMN = _mm_loadu_ps(i2 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
182 const __m128 vi3xGHIJ = _mm_loadu_ps(i3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
183 const __m128 vi3xKLMN = _mm_loadu_ps(i3 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
185 const __m128 vi4xGHIJ = _mm_loadu_ps(i4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
186 const __m128 vi4xKLMN = _mm_loadu_ps(i4 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
189 const __m128 vi0x79BD = _mm_move_ss(vi0xF9BD, vi0x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
191 const __m128 vi1x79BD = _mm_move_ss(vi1xF9BD, vi1x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
193 const __m128 vi2x79BD = _mm_move_ss(vi2xF9BD, vi2x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
195 const __m128 vi3x79BD = _mm_move_ss(vi3xF9BD, vi3x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
197 const __m128 vi4x79BD = _mm_move_ss(vi4xF9BD, vi4x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
200 const __m128 vi0xGIKM = _mm_shuffle_ps(vi0xGHIJ, vi0xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
201 const __m128 vi0xHJLN = _mm_shuffle_ps(vi0xGHIJ, vi0xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
203 const __m128 vi1xGIKM = _mm_shuffle_ps(vi1xGHIJ, vi1xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
204 const __m128 vi1xHJLN = _mm_shuffle_ps(vi1xGHIJ, vi1xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
206 const __m128 vi2xGIKM = _mm_shuffle_ps(vi2xGHIJ, vi2xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
207 const __m128 vi2xHJLN = _mm_shuffle_ps(vi2xGHIJ, vi2xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
209 const __m128 vi3xGIKM = _mm_shuffle_ps(vi3xGHIJ, vi3xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
210 const __m128 vi3xHJLN = _mm_shuffle_ps(vi3xGHIJ, vi3xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
212 const __m128 vi4xGIKM = _mm_shuffle_ps(vi4xGHIJ, vi4xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
213 const __m128 vi4xHJLN = _mm_shuffle_ps(vi4xGHIJ, vi4xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
222 const __m128 vi0xGACE = _mm_move_ss(vi0x8ACE, vi0xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
224 const __m128 vi1xGACE = _mm_move_ss(vi1x8ACE, vi1xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
226 const __m128 vi2xGACE = _mm_move_ss(vi2x8ACE, vi2xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
228 const __m128 vi3xGACE = _mm_move_ss(vi3x8ACE, vi3xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
230 const __m128 vi4xGACE = _mm_move_ss(vi4x8ACE, vi4xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
233 const __m128 vi0xACEG = _mm_shuffle_ps(vi0xGACE, vi0xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
234 const __m128 vi1xACEG = _mm_shuffle_ps(vi1xGACE, vi1xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
235 const __m128 vi2xACEG = _mm_shuffle_ps(vi2xGACE, vi2xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
236 const __m128 vi3xACEG = _mm_shuffle_ps(vi3xGACE, vi3xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
237 const __m128 vi4xACEG = _mm_shuffle_ps(vi4xGACE, vi4xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
249 __m128 vo0 = _mm_max_ps(vo0p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
271 __m128 vo0p0 = _mm_add_ps(vbias, _mm_mul_ps(vi0x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
272 __m128 vo0p1 = _mm_mul_ps(vi1x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
273 __m128 vo0p2 = _mm_mul_ps(vi2x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
274 __m128 vo0p3 = _mm_mul_ps(vi3x8ACE, vk32); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
277 const __m128 vi0xE8AC = _mm_shuffle_ps(vi0x8ACE, vi0x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
278 const __m128 vi1xE8AC = _mm_shuffle_ps(vi1x8ACE, vi1x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
279 const __m128 vi2xE8AC = _mm_shuffle_ps(vi2x8ACE, vi2x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
280 const __m128 vi3xE8AC = _mm_shuffle_ps(vi3x8ACE, vi3x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
281 const __m128 vi4xE8AC = _mm_shuffle_ps(vi4x8ACE, vi4x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
289 const __m128 vi0x68AC = _mm_move_ss(vi0xE8AC, vi0x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
290 const __m128 vi1x68AC = _mm_move_ss(vi1xE8AC, vi1x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
291 const __m128 vi2x68AC = _mm_move_ss(vi2xE8AC, vi2x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
292 const __m128 vi3x68AC = _mm_move_ss(vi3xE8AC, vi3x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
293 const __m128 vi4x68AC = _mm_move_ss(vi4xE8AC, vi4x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
295 const __m128 vi0xF9BD = _mm_shuffle_ps(vi0x9BDF, vi0x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
296 const __m128 vi1xF9BD = _mm_shuffle_ps(vi1x9BDF, vi1x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
297 const __m128 vi2xF9BD = _mm_shuffle_ps(vi2x9BDF, vi2x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
298 const __m128 vi3xF9BD = _mm_shuffle_ps(vi3x9BDF, vi3x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
299 const __m128 vi4xF9BD = _mm_shuffle_ps(vi4x9BDF, vi4x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
307 const __m128 vi0x79BD = _mm_move_ss(vi0xF9BD, vi0x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
308 const __m128 vi1x79BD = _mm_move_ss(vi1xF9BD, vi1x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
309 const __m128 vi2x79BD = _mm_move_ss(vi2xF9BD, vi2x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
310 const __m128 vi3x79BD = _mm_move_ss(vi3xF9BD, vi3x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
311 const __m128 vi4x79BD = _mm_move_ss(vi4xF9BD, vi4x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
319 const __m128 vzero = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
320 const __m128 vi0xGACE = _mm_move_ss(vi0x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
321 const __m128 vi1xGACE = _mm_move_ss(vi1x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
322 const __m128 vi2xGACE = _mm_move_ss(vi2x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
323 const __m128 vi3xGACE = _mm_move_ss(vi3x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
324 const __m128 vi4xGACE = _mm_move_ss(vi4x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
326 const __m128 vi0xACEG = _mm_shuffle_ps(vi0xGACE, vi0xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
327 const __m128 vi1xACEG = _mm_shuffle_ps(vi1xGACE, vi1xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
328 const __m128 vi2xACEG = _mm_shuffle_ps(vi2xGACE, vi2xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
329 const __m128 vi3xACEG = _mm_shuffle_ps(vi3xGACE, vi3xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
330 const __m128 vi4xACEG = _mm_shuffle_ps(vi4xGACE, vi4xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()
342 __m128 vo0 = _mm_max_ps(vo0p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4()