Lines Matching refs:__m128
34 const __m128 vmask_even = _mm_load_ps((const float*) params->sse.mask_even); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
35 const __m128 vmask_odd = _mm_load_ps((const float*) params->sse.mask_odd); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
36 const __m128 vmax = _mm_load_ps(params->sse.max); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
37 const __m128 vmin = _mm_load_ps(params->sse.min); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
39 const __m128 vbias = _mm_load1_ps(weights); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
40 const __m128 vk00 = _mm_load1_ps(weights + 1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
41 const __m128 vk01 = _mm_load1_ps(weights + 2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
42 const __m128 vk02 = _mm_load1_ps(weights + 3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
43 const __m128 vk03 = _mm_load1_ps(weights + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
44 const __m128 vk04 = _mm_load1_ps(weights + 5); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
45 const __m128 vk10 = _mm_load1_ps(weights + 6); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
46 const __m128 vk11 = _mm_load1_ps(weights + 7); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
47 const __m128 vk12 = _mm_load1_ps(weights + 8); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
48 const __m128 vk13 = _mm_load1_ps(weights + 9); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
49 const __m128 vk14 = _mm_load1_ps(weights + 10); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
50 const __m128 vk20 = _mm_load1_ps(weights + 11); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
51 const __m128 vk21 = _mm_load1_ps(weights + 12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
52 const __m128 vk22 = _mm_load1_ps(weights + 13); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
53 const __m128 vk23 = _mm_load1_ps(weights + 14); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
54 const __m128 vk24 = _mm_load1_ps(weights + 15); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
55 const __m128 vk30 = _mm_load1_ps(weights + 16); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
56 const __m128 vk31 = _mm_load1_ps(weights + 17); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
57 const __m128 vk32 = _mm_load1_ps(weights + 18); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
58 const __m128 vk33 = _mm_load1_ps(weights + 19); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
59 const __m128 vk34 = _mm_load1_ps(weights + 20); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
60 const __m128 vk40 = _mm_load1_ps(weights + 21); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
61 const __m128 vk41 = _mm_load1_ps(weights + 22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
62 const __m128 vk42 = _mm_load1_ps(weights + 23); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
63 const __m128 vk43 = _mm_load1_ps(weights + 24); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
64 const __m128 vk44 = _mm_load1_ps(weights + 25); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
102 __m128 vi0x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
103 __m128 vi1x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
104 __m128 vi2x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
105 __m128 vi3x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
106 __m128 vi4x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
107 __m128 vi5x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
108 __m128 vi6x6024 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
110 __m128 vi0x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
111 __m128 vi1x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
112 __m128 vi2x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
113 __m128 vi3x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
114 __m128 vi4x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
115 __m128 vi5x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
116 __m128 vi6x7135 = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
118 const __m128 vi0x89AB = _mm_loadu_ps(i0); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
119 const __m128 vi0xCDEF = _mm_loadu_ps(i0 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
121 const __m128 vi1x89AB = _mm_loadu_ps(i1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
122 const __m128 vi1xCDEF = _mm_loadu_ps(i1 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
124 const __m128 vi2x89AB = _mm_loadu_ps(i2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
125 const __m128 vi2xCDEF = _mm_loadu_ps(i2 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
127 const __m128 vi3x89AB = _mm_loadu_ps(i3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
128 const __m128 vi3xCDEF = _mm_loadu_ps(i3 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
130 const __m128 vi4x89AB = _mm_loadu_ps(i4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
131 const __m128 vi4xCDEF = _mm_loadu_ps(i4 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
133 const __m128 vi5x89AB = _mm_loadu_ps(i5); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
134 const __m128 vi5xCDEF = _mm_loadu_ps(i5 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
136 const __m128 vi6x89AB = _mm_loadu_ps(i6); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
137 const __m128 vi6xCDEF = _mm_loadu_ps(i6 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
140 __m128 vi0x8ACE = _mm_shuffle_ps(vi0x89AB, vi0xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
141 __m128 vi0x9BDF = _mm_shuffle_ps(vi0x89AB, vi0xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
142 __m128 vi1x8ACE = _mm_shuffle_ps(vi1x89AB, vi1xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
143 __m128 vi1x9BDF = _mm_shuffle_ps(vi1x89AB, vi1xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
144 __m128 vi2x8ACE = _mm_shuffle_ps(vi2x89AB, vi2xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
145 __m128 vi2x9BDF = _mm_shuffle_ps(vi2x89AB, vi2xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
146 __m128 vi3x8ACE = _mm_shuffle_ps(vi3x89AB, vi3xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
147 __m128 vi3x9BDF = _mm_shuffle_ps(vi3x89AB, vi3xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
148 __m128 vi4x8ACE = _mm_shuffle_ps(vi4x89AB, vi4xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
149 __m128 vi4x9BDF = _mm_shuffle_ps(vi4x89AB, vi4xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
150 __m128 vi5x8ACE = _mm_shuffle_ps(vi5x89AB, vi5xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
151 __m128 vi5x9BDF = _mm_shuffle_ps(vi5x89AB, vi5xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
152 __m128 vi6x8ACE = _mm_shuffle_ps(vi6x89AB, vi6xCDEF, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
153 __m128 vi6x9BDF = _mm_shuffle_ps(vi6x89AB, vi6xCDEF, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
157 __m128 vo0p0 = _mm_add_ps(vbias, _mm_mul_ps(vi0x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
158 __m128 vo1p0 = _mm_add_ps(vbias, _mm_mul_ps(vi2x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
159 __m128 vo0p1 = _mm_mul_ps(vi1x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
160 __m128 vo1p1 = _mm_mul_ps(vi3x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
161 __m128 vo0p2 = _mm_mul_ps(vi2x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
162 __m128 vo1p2 = _mm_mul_ps(vi4x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
168 const __m128 vi0xE8AC = _mm_shuffle_ps(vi0x8ACE, vi0x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
169 const __m128 vi1xE8AC = _mm_shuffle_ps(vi1x8ACE, vi1x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
170 const __m128 vi2xE8AC = _mm_shuffle_ps(vi2x8ACE, vi2x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
171 const __m128 vi3xE8AC = _mm_shuffle_ps(vi3x8ACE, vi3x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
172 const __m128 vi4xE8AC = _mm_shuffle_ps(vi4x8ACE, vi4x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
173 const __m128 vi5xE8AC = _mm_shuffle_ps(vi5x8ACE, vi5x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
174 const __m128 vi6xE8AC = _mm_shuffle_ps(vi6x8ACE, vi6x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
187 const __m128 vi0x68AC = _mm_move_ss(vi0xE8AC, vi0x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
189 const __m128 vi1x68AC = _mm_move_ss(vi1xE8AC, vi1x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
191 const __m128 vi2x68AC = _mm_move_ss(vi2xE8AC, vi2x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
193 const __m128 vi3x68AC = _mm_move_ss(vi3xE8AC, vi3x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
195 const __m128 vi4x68AC = _mm_move_ss(vi4xE8AC, vi4x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
197 const __m128 vi5x68AC = _mm_move_ss(vi5xE8AC, vi5x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
199 const __m128 vi6x68AC = _mm_move_ss(vi6xE8AC, vi6x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
202 const __m128 vi0xF9BD = _mm_shuffle_ps(vi0x9BDF, vi0x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
203 const __m128 vi1xF9BD = _mm_shuffle_ps(vi1x9BDF, vi1x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
204 const __m128 vi2xF9BD = _mm_shuffle_ps(vi2x9BDF, vi2x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
205 const __m128 vi3xF9BD = _mm_shuffle_ps(vi3x9BDF, vi3x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
206 const __m128 vi4xF9BD = _mm_shuffle_ps(vi4x9BDF, vi4x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
207 const __m128 vi5xF9BD = _mm_shuffle_ps(vi5x9BDF, vi5x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
208 const __m128 vi6xF9BD = _mm_shuffle_ps(vi6x9BDF, vi6x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
221 const __m128 vi0xGHIJ = _mm_loadu_ps(i0); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
222 const __m128 vi0xKLMN = _mm_loadu_ps(i0 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
224 const __m128 vi1xGHIJ = _mm_loadu_ps(i1); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
225 const __m128 vi1xKLMN = _mm_loadu_ps(i1 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
227 const __m128 vi2xGHIJ = _mm_loadu_ps(i2); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
228 const __m128 vi2xKLMN = _mm_loadu_ps(i2 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
230 const __m128 vi3xGHIJ = _mm_loadu_ps(i3); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
231 const __m128 vi3xKLMN = _mm_loadu_ps(i3 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
233 const __m128 vi4xGHIJ = _mm_loadu_ps(i4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
234 const __m128 vi4xKLMN = _mm_loadu_ps(i4 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
236 const __m128 vi5xGHIJ = _mm_loadu_ps(i5); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
237 const __m128 vi5xKLMN = _mm_loadu_ps(i5 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
239 const __m128 vi6xGHIJ = _mm_loadu_ps(i6); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
240 const __m128 vi6xKLMN = _mm_loadu_ps(i6 + 4); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
243 const __m128 vi0x79BD = _mm_move_ss(vi0xF9BD, vi0x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
245 const __m128 vi1x79BD = _mm_move_ss(vi1xF9BD, vi1x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
247 const __m128 vi2x79BD = _mm_move_ss(vi2xF9BD, vi2x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
249 const __m128 vi3x79BD = _mm_move_ss(vi3xF9BD, vi3x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
251 const __m128 vi4x79BD = _mm_move_ss(vi4xF9BD, vi4x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
253 const __m128 vi5x79BD = _mm_move_ss(vi5xF9BD, vi5x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
255 const __m128 vi6x79BD = _mm_move_ss(vi6xF9BD, vi6x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
258 const __m128 vi0xGIKM = _mm_shuffle_ps(vi0xGHIJ, vi0xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
259 const __m128 vi0xHJLN = _mm_shuffle_ps(vi0xGHIJ, vi0xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
261 const __m128 vi1xGIKM = _mm_shuffle_ps(vi1xGHIJ, vi1xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
262 const __m128 vi1xHJLN = _mm_shuffle_ps(vi1xGHIJ, vi1xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
264 const __m128 vi2xGIKM = _mm_shuffle_ps(vi2xGHIJ, vi2xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
265 const __m128 vi2xHJLN = _mm_shuffle_ps(vi2xGHIJ, vi2xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
267 const __m128 vi3xGIKM = _mm_shuffle_ps(vi3xGHIJ, vi3xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
268 const __m128 vi3xHJLN = _mm_shuffle_ps(vi3xGHIJ, vi3xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
270 const __m128 vi4xGIKM = _mm_shuffle_ps(vi4xGHIJ, vi4xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
271 const __m128 vi4xHJLN = _mm_shuffle_ps(vi4xGHIJ, vi4xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
273 const __m128 vi5xGIKM = _mm_shuffle_ps(vi5xGHIJ, vi5xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
274 const __m128 vi5xHJLN = _mm_shuffle_ps(vi5xGHIJ, vi5xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
276 const __m128 vi6xGIKM = _mm_shuffle_ps(vi6xGHIJ, vi6xKLMN, _MM_SHUFFLE(2, 0, 2, 0)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
277 const __m128 vi6xHJLN = _mm_shuffle_ps(vi6xGHIJ, vi6xKLMN, _MM_SHUFFLE(3, 1, 3, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
291 const __m128 vi0xGACE = _mm_move_ss(vi0x8ACE, vi0xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
293 const __m128 vi1xGACE = _mm_move_ss(vi1x8ACE, vi1xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
295 const __m128 vi2xGACE = _mm_move_ss(vi2x8ACE, vi2xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
297 const __m128 vi3xGACE = _mm_move_ss(vi3x8ACE, vi3xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
299 const __m128 vi4xGACE = _mm_move_ss(vi4x8ACE, vi4xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
301 const __m128 vi5xGACE = _mm_move_ss(vi5x8ACE, vi5xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
303 const __m128 vi6xGACE = _mm_move_ss(vi6x8ACE, vi6xGIKM); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
306 const __m128 vi0xACEG = _mm_shuffle_ps(vi0xGACE, vi0xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
307 const __m128 vi1xACEG = _mm_shuffle_ps(vi1xGACE, vi1xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
308 const __m128 vi2xACEG = _mm_shuffle_ps(vi2xGACE, vi2xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
309 const __m128 vi3xACEG = _mm_shuffle_ps(vi3xGACE, vi3xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
310 const __m128 vi4xACEG = _mm_shuffle_ps(vi4xGACE, vi4xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
311 const __m128 vi5xACEG = _mm_shuffle_ps(vi5xGACE, vi5xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
312 const __m128 vi6xACEG = _mm_shuffle_ps(vi6xGACE, vi6xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
330 __m128 vo0 = _mm_max_ps(vo0p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
331 __m128 vo1 = _mm_max_ps(vo1p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
360 __m128 vo0p0 = _mm_add_ps(vbias, _mm_mul_ps(vi0x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
361 __m128 vo1p0 = _mm_add_ps(vbias, _mm_mul_ps(vi2x8ACE, vk02)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
362 __m128 vo0p1 = _mm_mul_ps(vi1x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
363 __m128 vo1p1 = _mm_mul_ps(vi3x8ACE, vk12); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
364 __m128 vo0p2 = _mm_mul_ps(vi2x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
365 __m128 vo1p2 = _mm_mul_ps(vi4x8ACE, vk22); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
371 const __m128 vi0xE8AC = _mm_shuffle_ps(vi0x8ACE, vi0x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
372 const __m128 vi1xE8AC = _mm_shuffle_ps(vi1x8ACE, vi1x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
373 const __m128 vi2xE8AC = _mm_shuffle_ps(vi2x8ACE, vi2x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
374 const __m128 vi3xE8AC = _mm_shuffle_ps(vi3x8ACE, vi3x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
375 const __m128 vi4xE8AC = _mm_shuffle_ps(vi4x8ACE, vi4x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
376 const __m128 vi5xE8AC = _mm_shuffle_ps(vi5x8ACE, vi5x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
377 const __m128 vi6xE8AC = _mm_shuffle_ps(vi6x8ACE, vi6x8ACE, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
390 const __m128 vi0x68AC = _mm_move_ss(vi0xE8AC, vi0x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
391 const __m128 vi1x68AC = _mm_move_ss(vi1xE8AC, vi1x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
392 const __m128 vi2x68AC = _mm_move_ss(vi2xE8AC, vi2x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
393 const __m128 vi3x68AC = _mm_move_ss(vi3xE8AC, vi3x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
394 const __m128 vi4x68AC = _mm_move_ss(vi4xE8AC, vi4x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
395 const __m128 vi5x68AC = _mm_move_ss(vi5xE8AC, vi5x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
396 const __m128 vi6x68AC = _mm_move_ss(vi6xE8AC, vi6x6024); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
398 const __m128 vi0xF9BD = _mm_shuffle_ps(vi0x9BDF, vi0x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
399 const __m128 vi1xF9BD = _mm_shuffle_ps(vi1x9BDF, vi1x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
400 const __m128 vi2xF9BD = _mm_shuffle_ps(vi2x9BDF, vi2x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
401 const __m128 vi3xF9BD = _mm_shuffle_ps(vi3x9BDF, vi3x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
402 const __m128 vi4xF9BD = _mm_shuffle_ps(vi4x9BDF, vi4x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
403 const __m128 vi5xF9BD = _mm_shuffle_ps(vi5x9BDF, vi5x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
404 const __m128 vi6xF9BD = _mm_shuffle_ps(vi6x9BDF, vi6x9BDF, _MM_SHUFFLE(2, 1, 0, 3)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
417 const __m128 vi0x79BD = _mm_move_ss(vi0xF9BD, vi0x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
418 const __m128 vi1x79BD = _mm_move_ss(vi1xF9BD, vi1x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
419 const __m128 vi2x79BD = _mm_move_ss(vi2xF9BD, vi2x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
420 const __m128 vi3x79BD = _mm_move_ss(vi3xF9BD, vi3x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
421 const __m128 vi4x79BD = _mm_move_ss(vi4xF9BD, vi4x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
422 const __m128 vi5x79BD = _mm_move_ss(vi5xF9BD, vi5x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
423 const __m128 vi6x79BD = _mm_move_ss(vi6xF9BD, vi6x7135); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
436 const __m128 vzero = _mm_setzero_ps(); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
437 const __m128 vi0xGACE = _mm_move_ss(vi0x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
438 const __m128 vi1xGACE = _mm_move_ss(vi1x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
439 const __m128 vi2xGACE = _mm_move_ss(vi2x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
440 const __m128 vi3xGACE = _mm_move_ss(vi3x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
441 const __m128 vi4xGACE = _mm_move_ss(vi4x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
442 const __m128 vi5xGACE = _mm_move_ss(vi5x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
443 const __m128 vi6xGACE = _mm_move_ss(vi6x8ACE, vzero); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
445 const __m128 vi0xACEG = _mm_shuffle_ps(vi0xGACE, vi0xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
446 const __m128 vi1xACEG = _mm_shuffle_ps(vi1xGACE, vi1xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
447 const __m128 vi2xACEG = _mm_shuffle_ps(vi2xGACE, vi2xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
448 const __m128 vi3xACEG = _mm_shuffle_ps(vi3xGACE, vi3xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
449 const __m128 vi4xACEG = _mm_shuffle_ps(vi4xGACE, vi4xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
450 const __m128 vi5xACEG = _mm_shuffle_ps(vi5xGACE, vi5xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
451 const __m128 vi6xACEG = _mm_shuffle_ps(vi6xGACE, vi6xGACE, _MM_SHUFFLE(0, 3, 2, 1)); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
469 __m128 vo0 = _mm_max_ps(vo0p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()
470 __m128 vo1 = _mm_max_ps(vo1p0, vmin); in xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3()