Lines Matching refs:reg_set16
265 reg_set16((reg_offset * PHY_SHFT(USB3) + addr), data, mask); in comphy_usb3_set_direct()
294 reg_set16(SGMIIPHY_ADDR(addr, sd_ip_addr), val, 0xFFFF); in comphy_sgmii_phy_init()
448 reg_set16(SGMIIPHY_ADDR(COMPHY_POWER_PLL_CTRL, sd_ip_addr), data, mask); in mvebu_a3700_comphy_sgmii_power_on()
456 reg_set16(SGMIIPHY_ADDR(COMPHY_MISC_REG0_ADDR, sd_ip_addr), data, mask); in mvebu_a3700_comphy_sgmii_power_on()
468 reg_set16(SGMIIPHY_ADDR(COMPHY_POWER_PLL_CTRL, sd_ip_addr), data, mask); in mvebu_a3700_comphy_sgmii_power_on()
483 reg_set16(SGMIIPHY_ADDR(COMPHY_LOOPBACK_REG0, sd_ip_addr), data, mask); in mvebu_a3700_comphy_sgmii_power_on()
528 reg_set16(SGMIIPHY_ADDR(COMPHY_SYNC_PATTERN_REG, sd_ip_addr), data, 0); in mvebu_a3700_comphy_sgmii_power_on()
810 reg_set16(LANE_CFG1_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
814 reg_set16(GLOB_CLK_SRC_LO_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
818 reg_set16(MISC_REG1_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
822 reg_set16(PWR_MGM_TIM1_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
828 reg_set16(UNIT_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
832 reg_set16(MISC_REG0_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
851 reg_set16(PWR_PLL_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
857 reg_set16(KVCO_CAL_CTRL_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
862 reg_set16(SYNC_PATTERN_REG_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
866 reg_set16(SYNC_PATTERN_REG_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()
870 reg_set16(GLOB_PHY_CTRL0_ADDR(PCIE) + COMPHY_SD_ADDR, in mvebu_a3700_comphy_pcie_power_on()