Lines Matching refs:ARM64_INS_LD1
2761 { /* AArch64_LD1Fourv16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2765 { /* AArch64_LD1Fourv16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2769 { /* AArch64_LD1Fourv1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2773 { /* AArch64_LD1Fourv1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2777 { /* AArch64_LD1Fourv2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2781 { /* AArch64_LD1Fourv2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2785 { /* AArch64_LD1Fourv2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2789 { /* AArch64_LD1Fourv2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2793 { /* AArch64_LD1Fourv4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2797 { /* AArch64_LD1Fourv4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2801 { /* AArch64_LD1Fourv4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2805 { /* AArch64_LD1Fourv4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2809 { /* AArch64_LD1Fourv8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2813 { /* AArch64_LD1Fourv8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2817 { /* AArch64_LD1Fourv8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2821 { /* AArch64_LD1Fourv8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2825 { /* AArch64_LD1Onev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2829 { /* AArch64_LD1Onev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2833 { /* AArch64_LD1Onev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2837 { /* AArch64_LD1Onev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2841 { /* AArch64_LD1Onev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2845 { /* AArch64_LD1Onev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2849 { /* AArch64_LD1Onev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2853 { /* AArch64_LD1Onev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2857 { /* AArch64_LD1Onev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2861 { /* AArch64_LD1Onev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2865 { /* AArch64_LD1Onev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2869 { /* AArch64_LD1Onev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2873 { /* AArch64_LD1Onev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2877 { /* AArch64_LD1Onev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2881 { /* AArch64_LD1Onev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2885 { /* AArch64_LD1Onev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2953 { /* AArch64_LD1Threev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2957 { /* AArch64_LD1Threev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2961 { /* AArch64_LD1Threev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2965 { /* AArch64_LD1Threev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2969 { /* AArch64_LD1Threev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2973 { /* AArch64_LD1Threev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2977 { /* AArch64_LD1Threev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2981 { /* AArch64_LD1Threev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2985 { /* AArch64_LD1Threev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2989 { /* AArch64_LD1Threev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2993 { /* AArch64_LD1Threev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2997 { /* AArch64_LD1Threev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3001 { /* AArch64_LD1Threev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3005 { /* AArch64_LD1Threev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3009 { /* AArch64_LD1Threev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3013 { /* AArch64_LD1Threev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3017 { /* AArch64_LD1Twov16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3021 { /* AArch64_LD1Twov16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3025 { /* AArch64_LD1Twov1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
3029 { /* AArch64_LD1Twov1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3033 { /* AArch64_LD1Twov2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
3037 { /* AArch64_LD1Twov2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3041 { /* AArch64_LD1Twov2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
3045 { /* AArch64_LD1Twov2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3049 { /* AArch64_LD1Twov4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3053 { /* AArch64_LD1Twov4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3057 { /* AArch64_LD1Twov4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
3061 { /* AArch64_LD1Twov4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3065 { /* AArch64_LD1Twov8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3069 { /* AArch64_LD1Twov8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3073 { /* AArch64_LD1Twov8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3077 { /* AArch64_LD1Twov8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3081 { /* AArch64_LD1i16, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3085 { /* AArch64_LD1i16_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3089 { /* AArch64_LD1i32, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3093 { /* AArch64_LD1i32_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3097 { /* AArch64_LD1i64, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3101 { /* AArch64_LD1i64_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3105 { /* AArch64_LD1i8, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3109 { /* AArch64_LD1i8_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */