Lines Matching refs:ARM64_INS_LD2
3177 { /* AArch64_LD2Twov16b, ARM64_INS_LD2: ld2 $vt, [$rn] */
3181 { /* AArch64_LD2Twov16b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3185 { /* AArch64_LD2Twov2d, ARM64_INS_LD2: ld2 $vt, [$rn] */
3189 { /* AArch64_LD2Twov2d_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3193 { /* AArch64_LD2Twov2s, ARM64_INS_LD2: ld2 $vt, [$rn] */
3197 { /* AArch64_LD2Twov2s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3201 { /* AArch64_LD2Twov4h, ARM64_INS_LD2: ld2 $vt, [$rn] */
3205 { /* AArch64_LD2Twov4h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3209 { /* AArch64_LD2Twov4s, ARM64_INS_LD2: ld2 $vt, [$rn] */
3213 { /* AArch64_LD2Twov4s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3217 { /* AArch64_LD2Twov8b, ARM64_INS_LD2: ld2 $vt, [$rn] */
3221 { /* AArch64_LD2Twov8b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3225 { /* AArch64_LD2Twov8h, ARM64_INS_LD2: ld2 $vt, [$rn] */
3229 { /* AArch64_LD2Twov8h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3233 { /* AArch64_LD2i16, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3237 { /* AArch64_LD2i16_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3241 { /* AArch64_LD2i32, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3245 { /* AArch64_LD2i32_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3249 { /* AArch64_LD2i64, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3253 { /* AArch64_LD2i64_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3257 { /* AArch64_LD2i8, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3261 { /* AArch64_LD2i8_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */