Lines Matching refs:ARM_INS_VLD2

2395 {	/* ARM_VLD2DUPd16, ARM_INS_VLD2: vld2${p}.16	$vd, $rn */
2398 { /* ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
2401 { /* ARM_VLD2DUPd16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
2404 { /* ARM_VLD2DUPd16x2, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
2407 { /* ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
2410 { /* ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
2413 { /* ARM_VLD2DUPd32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
2416 { /* ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
2419 { /* ARM_VLD2DUPd32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
2422 { /* ARM_VLD2DUPd32x2, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
2425 { /* ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
2428 { /* ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
2431 { /* ARM_VLD2DUPd8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
2434 { /* ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
2437 { /* ARM_VLD2DUPd8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
2440 { /* ARM_VLD2DUPd8x2, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
2443 { /* ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
2446 { /* ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
2449 { /* ARM_VLD2LNd16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */
2452 { /* ARM_VLD2LNd16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
2455 { /* ARM_VLD2LNd32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */
2458 { /* ARM_VLD2LNd32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
2461 { /* ARM_VLD2LNd8, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn */
2464 { /* ARM_VLD2LNd8_UPD, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
2467 { /* ARM_VLD2LNq16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */
2470 { /* ARM_VLD2LNq16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
2473 { /* ARM_VLD2LNq32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */
2476 { /* ARM_VLD2LNq32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
2479 { /* ARM_VLD2b16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
2482 { /* ARM_VLD2b16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
2485 { /* ARM_VLD2b16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
2488 { /* ARM_VLD2b32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
2491 { /* ARM_VLD2b32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
2494 { /* ARM_VLD2b32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
2497 { /* ARM_VLD2b8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
2500 { /* ARM_VLD2b8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
2503 { /* ARM_VLD2b8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
2506 { /* ARM_VLD2d16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
2509 { /* ARM_VLD2d16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
2512 { /* ARM_VLD2d16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
2515 { /* ARM_VLD2d32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
2518 { /* ARM_VLD2d32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
2521 { /* ARM_VLD2d32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
2524 { /* ARM_VLD2d8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
2527 { /* ARM_VLD2d8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
2530 { /* ARM_VLD2d8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
2533 { /* ARM_VLD2q16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
2536 { /* ARM_VLD2q16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
2539 { /* ARM_VLD2q16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
2542 { /* ARM_VLD2q32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
2545 { /* ARM_VLD2q32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
2548 { /* ARM_VLD2q32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
2551 { /* ARM_VLD2q8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
2554 { /* ARM_VLD2q8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
2557 { /* ARM_VLD2q8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */