Lines Matching refs:MCPhysReg
350 static const MCPhysReg X86RegDiffLists[] = {
654 static const MCPhysReg GR8[] = {
664 static const MCPhysReg GR8_NOREX[] = {
674 static const MCPhysReg VK1[] = {
684 static const MCPhysReg VK2[] = {
694 static const MCPhysReg VK4[] = {
704 static const MCPhysReg VK8[] = {
714 static const MCPhysReg VK1WM[] = {
724 static const MCPhysReg VK2WM[] = {
734 static const MCPhysReg VK4WM[] = {
744 static const MCPhysReg VK8WM[] = {
754 static MCPhysReg GR8_ABCD_H[] = {
764 static MCPhysReg GR8_ABCD_L[] = {
774 static MCPhysReg GR16[] = {
784 static MCPhysReg GR16_NOREX[] = {
794 static MCPhysReg VK16[] = {
804 static MCPhysReg VK16WM[] = {
814 static const MCPhysReg SEGMENT_REG[] = {
824 static const MCPhysReg GR16_ABCD[] = {
834 static const MCPhysReg FPCCR[] = {
844 static const MCPhysReg FR32X[] = {
854 static const MCPhysReg FR32[] = {
864 static const MCPhysReg GR32[] = {
874 static const MCPhysReg GR32_NOAX[] = {
884 static const MCPhysReg GR32_NOSP[] = {
894 static const MCPhysReg GR32_NOAX_and_GR32_NOSP[] = {
904 static const MCPhysReg DEBUG_REG[] = {
914 static const MCPhysReg GR32_NOREX[] = {
924 static const MCPhysReg VK32[] = {
934 static const MCPhysReg GR32_NOAX_and_GR32_NOREX[] = {
944 static const MCPhysReg GR32_NOREX_NOSP[] = {
954 static const MCPhysReg RFP32[] = {
964 static const MCPhysReg VK32WM[] = {
974 static const MCPhysReg GR32_NOAX_and_GR32_NOREX_NOSP[] = {
984 static const MCPhysReg GR32_ABCD[] = {
994 static const MCPhysReg GR32_ABCD_and_GR32_NOAX[] = {
1004 static const MCPhysReg GR32_TC[] = {
1014 static const MCPhysReg GR32_AD[] = {
1024 static const MCPhysReg GR32_NOAX_and_GR32_TC[] = {
1034 static const MCPhysReg CCR[] = {
1044 static const MCPhysReg GR32_AD_and_GR32_NOAX[] = {
1054 static const MCPhysReg RFP64[] = {
1064 static const MCPhysReg FR64X[] = {
1074 static const MCPhysReg GR64[] = {
1084 static const MCPhysReg CONTROL_REG[] = {
1094 static const MCPhysReg FR64[] = {
1104 static const MCPhysReg GR64_with_sub_8bit[] = {
1114 static const MCPhysReg GR64_NOSP[] = {
1124 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX[] = {
1134 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP[] = {
1144 static const MCPhysReg GR64_NOREX[] = {
1154 static const MCPhysReg GR64_TC[] = {
1164 static const MCPhysReg GR64_NOSP_and_GR64_TC[] = {
1174 static const MCPhysReg GR64_with_sub_16bit_in_GR16_NOREX[] = {
1184 static const MCPhysReg VK64[] = {
1194 static const MCPhysReg VR64[] = {
1204 static const MCPhysReg GR64_NOREX_NOSP[] = {
1214 static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX[] = {
1224 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = {
1234 static const MCPhysReg VK64WM[] = {
1244 static const MCPhysReg GR64_NOREX_and_GR64_TC[] = {
1254 static const MCPhysReg GR64_TCW64[] = {
1264 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP[] = {
1274 static const MCPhysReg GR64_NOREX_NOSP_and_GR64_TC[] = {
1284 static const MCPhysReg GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX[] = {
1294 static const MCPhysReg GR64_ABCD[] = {
1304 static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = {
1314 static const MCPhysReg GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX[] = {
1324 static const MCPhysReg GR64_with_sub_32bit_in_GR32_TC[] = {
1334 static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD[] = {
1344 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC[] = {
1354 static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX[] = {
1364 static const MCPhysReg RST[] = {
1374 static const MCPhysReg RFP80[] = {
1384 static const MCPhysReg VR128X[] = {
1394 static const MCPhysReg VR128[] = {
1404 static const MCPhysReg VR256X[] = {
1414 static const MCPhysReg VR256[] = {
1424 static const MCPhysReg VR512[] = {
1434 static const MCPhysReg VR512_with_sub_xmm_in_FR32[] = {