Lines Matching refs:X86_INS_VDIVPS
12708 { /* X86_VDIVPSYrm, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */
12712 { /* X86_VDIVPSYrr, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */
12716 { /* X86_VDIVPSZ128rm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12720 { /* X86_VDIVPSZ128rmb, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1…
12724 { /* X86_VDIVPSZ128rmbk, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}…
12728 { /* X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${…
12732 { /* X86_VDIVPSZ128rmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1,…
12736 { /* X86_VDIVPSZ128rmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z…
12740 { /* X86_VDIVPSZ128rr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12744 { /* X86_VDIVPSZ128rrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1,…
12748 { /* X86_VDIVPSZ128rrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z…
12752 { /* X86_VDIVPSZ256rm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12756 { /* X86_VDIVPSZ256rmb, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1…
12760 { /* X86_VDIVPSZ256rmbk, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}…
12764 { /* X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${…
12768 { /* X86_VDIVPSZ256rmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1,…
12772 { /* X86_VDIVPSZ256rmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z…
12776 { /* X86_VDIVPSZ256rr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12780 { /* X86_VDIVPSZ256rrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1,…
12784 { /* X86_VDIVPSZ256rrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z…
12788 { /* X86_VDIVPSZrb, X86_INS_VDIVPS: vdivps $dst , $src1, $src2, $rc */
12792 { /* X86_VDIVPSZrbk, X86_INS_VDIVPS: vdivps {$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src…
12796 { /* X86_VDIVPSZrbkz, X86_INS_VDIVPS: vdivps {$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} …
12800 { /* X86_VDIVPSZrm, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12804 { /* X86_VDIVPSZrmb, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to…
12808 { /* X86_VDIVPSZrmbk, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}},…
12812 { /* X86_VDIVPSZrmbkz, X86_INS_VDIVPS: vdivps {${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${ma…
12816 { /* X86_VDIVPSZrmk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $s…
12820 { /* X86_VDIVPSZrmkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, …
12824 { /* X86_VDIVPSZrr, X86_INS_VDIVPS: vdivps $dst , $src1, $src2 */
12828 { /* X86_VDIVPSZrrk, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $s…
12832 { /* X86_VDIVPSZrrkz, X86_INS_VDIVPS: vdivps {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, …
12836 { /* X86_VDIVPSrm, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */
12840 { /* X86_VDIVPSrr, X86_INS_VDIVPS: vdivps $dst, $src1, $src2 */