Lines Matching refs:__v4si
43 return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b, in _mm_cmpeq_epi32_mask()
49 return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b, in _mm_mask_cmpeq_epi32_mask()
55 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0, in _mm_cmpeq_epu32_mask()
61 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0, in _mm_mask_cmpeq_epu32_mask()
140 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5, in _mm_cmpge_epi32_mask()
146 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5, in _mm_mask_cmpge_epi32_mask()
152 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5, in _mm_cmpge_epu32_mask()
158 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5, in _mm_mask_cmpge_epu32_mask()
236 return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b, in _mm_cmpgt_epi32_mask()
242 return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b, in _mm_mask_cmpgt_epi32_mask()
248 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6, in _mm_cmpgt_epu32_mask()
254 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6, in _mm_mask_cmpgt_epu32_mask()
332 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2, in _mm_cmple_epi32_mask()
338 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2, in _mm_mask_cmple_epi32_mask()
344 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2, in _mm_cmple_epu32_mask()
350 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2, in _mm_mask_cmple_epu32_mask()
428 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1, in _mm_cmplt_epi32_mask()
434 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1, in _mm_mask_cmplt_epi32_mask()
440 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1, in _mm_cmplt_epu32_mask()
446 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1, in _mm_mask_cmplt_epu32_mask()
524 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4, in _mm_cmpneq_epi32_mask()
530 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4, in _mm_mask_cmpneq_epi32_mask()
536 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4, in _mm_cmpneq_epu32_mask()
542 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4, in _mm_mask_cmpneq_epu32_mask()
702 return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A, in _mm_mask_add_epi32()
703 (__v4si) __B, in _mm_mask_add_epi32()
704 (__v4si) __W, in _mm_mask_add_epi32()
711 return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A, in _mm_maskz_add_epi32()
712 (__v4si) __B, in _mm_maskz_add_epi32()
713 (__v4si) in _mm_maskz_add_epi32()
742 return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A, in _mm_mask_sub_epi32()
743 (__v4si) __B, in _mm_mask_sub_epi32()
744 (__v4si) __W, in _mm_mask_sub_epi32()
751 return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A, in _mm_maskz_sub_epi32()
752 (__v4si) __B, in _mm_maskz_sub_epi32()
753 (__v4si) in _mm_maskz_sub_epi32()
801 return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X, in _mm_mask_mul_epi32()
802 (__v4si) __Y, in _mm_mask_mul_epi32()
809 return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X, in _mm_maskz_mul_epi32()
810 (__v4si) __Y, in _mm_maskz_mul_epi32()
839 return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X, in _mm_mask_mul_epu32()
840 (__v4si) __Y, in _mm_mask_mul_epu32()
847 return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X, in _mm_maskz_mul_epu32()
848 (__v4si) __Y, in _mm_maskz_mul_epu32()
876 return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A, in _mm_maskz_mullo_epi32()
877 (__v4si) __B, in _mm_maskz_mullo_epi32()
878 (__v4si) in _mm_maskz_mullo_epi32()
887 return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A, in _mm_mask_mullo_epi32()
888 (__v4si) __B, in _mm_mask_mullo_epi32()
889 (__v4si) __W, __M); in _mm_mask_mullo_epi32()
910 (__v4si)_mm_and_si128(__A, __B), in _mm_mask_and_epi32()
911 (__v4si)__W); in _mm_mask_and_epi32()
939 (__v4si)_mm_andnot_si128(__A, __B), in _mm_mask_andnot_epi32()
940 (__v4si)__W); in _mm_mask_andnot_epi32()
967 (__v4si)_mm_or_si128(__A, __B), in _mm_mask_or_epi32()
968 (__v4si)__W); in _mm_mask_or_epi32()
996 (__v4si)_mm_xor_si128(__A, __B), in _mm_mask_xor_epi32()
997 (__v4si)__W); in _mm_mask_xor_epi32()
1121 (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1122 (__v4si)(__m128i)(b), (int)(p), \
1126 (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1127 (__v4si)(__m128i)(b), (int)(p), \
1131 (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1132 (__v4si)(__m128i)(b), (int)(p), \
1136 (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1137 (__v4si)(__m128i)(b), (int)(p), \
1968 (__v4si) __W, in _mm_mask_blend_epi32()
1969 (__v4si) __A); in _mm_mask_blend_epi32()
2113 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A, in _mm_mask_compress_epi32()
2114 (__v4si) __W, in _mm_mask_compress_epi32()
2120 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A, in _mm_maskz_compress_epi32()
2121 (__v4si) in _mm_maskz_compress_epi32()
2185 __builtin_ia32_compressstoresi128_mask ((__v4si *) __P, in _mm_mask_compressstoreu_epi32()
2186 (__v4si) __A, in _mm_mask_compressstoreu_epi32()
2199 return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A, in _mm_mask_cvtepi32_pd()
2206 return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A, in _mm_maskz_cvtepi32_pd()
2214 return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A, in _mm256_mask_cvtepi32_pd()
2221 return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A, in _mm256_maskz_cvtepi32_pd()
2229 return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A, in _mm_mask_cvtepi32_ps()
2236 return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A, in _mm_maskz_cvtepi32_ps()
2260 (__v4si) __W, in _mm_mask_cvtpd_epi32()
2267 (__v4si) in _mm_maskz_cvtpd_epi32()
2275 (__v4si) __W, in _mm256_mask_cvtpd_epi32()
2282 (__v4si) in _mm256_maskz_cvtpd_epi32()
2320 (__v4si) in _mm_cvtpd_epu32()
2328 (__v4si) __W, in _mm_mask_cvtpd_epu32()
2335 (__v4si) in _mm_maskz_cvtpd_epu32()
2343 (__v4si) in _mm256_cvtpd_epu32()
2351 (__v4si) __W, in _mm256_mask_cvtpd_epu32()
2358 (__v4si) in _mm256_maskz_cvtpd_epu32()
2366 (__v4si) __W, in _mm_mask_cvtps_epi32()
2373 (__v4si) in _mm_maskz_cvtps_epi32()
2426 (__v4si) in _mm_cvtps_epu32()
2434 (__v4si) __W, in _mm_mask_cvtps_epu32()
2441 (__v4si) in _mm_maskz_cvtps_epu32()
2472 (__v4si) __W, in _mm_mask_cvttpd_epi32()
2479 (__v4si) in _mm_maskz_cvttpd_epi32()
2487 (__v4si) __W, in _mm256_mask_cvttpd_epi32()
2494 (__v4si) in _mm256_maskz_cvttpd_epi32()
2502 (__v4si) in _mm_cvttpd_epu32()
2510 (__v4si) __W, in _mm_mask_cvttpd_epu32()
2517 (__v4si) in _mm_maskz_cvttpd_epu32()
2525 (__v4si) in _mm256_cvttpd_epu32()
2533 (__v4si) __W, in _mm256_mask_cvttpd_epu32()
2540 (__v4si) in _mm256_maskz_cvttpd_epu32()
2548 (__v4si) __W, in _mm_mask_cvttps_epi32()
2555 (__v4si) in _mm_maskz_cvttps_epi32()
2578 (__v4si) in _mm_cvttps_epu32()
2586 (__v4si) __W, in _mm_mask_cvttps_epu32()
2593 (__v4si) in _mm_maskz_cvttps_epu32()
2623 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A, in _mm_cvtepu32_pd()
2631 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A, in _mm_mask_cvtepu32_pd()
2638 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A, in _mm_maskz_cvtepu32_pd()
2646 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A, in _mm256_cvtepu32_pd()
2654 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A, in _mm256_mask_cvtepu32_pd()
2661 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A, in _mm256_maskz_cvtepu32_pd()
2669 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A, in _mm_cvtepu32_ps()
2677 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A, in _mm_mask_cvtepu32_ps()
2684 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A, in _mm_maskz_cvtepu32_ps()
2945 return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P, in _mm_mask_expandloadu_epi32()
2946 (__v4si) __W, in _mm_mask_expandloadu_epi32()
2953 return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P, in _mm_maskz_expandloadu_epi32()
2954 (__v4si) in _mm_maskz_expandloadu_epi32()
3009 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A, in _mm_mask_expand_epi32()
3010 (__v4si) __W, in _mm_mask_expand_epi32()
3016 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A, in _mm_maskz_expand_epi32()
3017 (__v4si) in _mm_maskz_expand_epi32()
3338 return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A, in _mm_mask_abs_epi32()
3339 (__v4si) __W, in _mm_mask_abs_epi32()
3345 return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A, in _mm_maskz_abs_epi32()
3346 (__v4si) in _mm_maskz_abs_epi32()
3414 return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A, in _mm_maskz_max_epi32()
3415 (__v4si) __B, in _mm_maskz_max_epi32()
3416 (__v4si) in _mm_maskz_max_epi32()
3424 return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A, in _mm_mask_max_epi32()
3425 (__v4si) __B, in _mm_mask_max_epi32()
3426 (__v4si) __W, __M); in _mm_mask_max_epi32()
3500 return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A, in _mm_maskz_max_epu32()
3501 (__v4si) __B, in _mm_maskz_max_epu32()
3502 (__v4si) in _mm_maskz_max_epu32()
3510 return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A, in _mm_mask_max_epu32()
3511 (__v4si) __B, in _mm_mask_max_epu32()
3512 (__v4si) __W, __M); in _mm_mask_max_epu32()
3586 return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A, in _mm_maskz_min_epi32()
3587 (__v4si) __B, in _mm_maskz_min_epi32()
3588 (__v4si) in _mm_maskz_min_epi32()
3596 return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A, in _mm_mask_min_epi32()
3597 (__v4si) __B, in _mm_mask_min_epi32()
3598 (__v4si) __W, __M); in _mm_mask_min_epi32()
3672 return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A, in _mm_maskz_min_epu32()
3673 (__v4si) __B, in _mm_maskz_min_epu32()
3674 (__v4si) in _mm_maskz_min_epu32()
3682 return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A, in _mm_mask_min_epu32()
3683 (__v4si) __B, in _mm_mask_min_epu32()
3684 (__v4si) __W, __M); in _mm_mask_min_epu32()
3990 (__v4si)(__m128i)(v1), (int)(scale)); })
3995 (__v4si)(__m128i)(v1), (int)(scale)); })
4010 (__v4si)(__m128i)(v1), (int)(scale)); })
4015 (__v4si)(__m128i)(v1), (int)(scale)); })
4019 (__v4si)(__m128i)(index), \
4024 (__v4si)(__m128i)(index), \
4029 (__v4si)(__m128i)(index), \
4034 (__v4si)(__m128i)(index), \
4039 (__v4si)(__m128i)(index), \
4044 (__v4si)(__m128i)(index), \
4049 (__v4si)(__m128i)(index), \
4054 (__v4si)(__m128i)(index), \
4059 (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \
4064 (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \
4069 (__v4si)(__m128i)(index), \
4070 (__v4si)(__m128i)(v1), (int)(scale)); })
4074 (__v4si)(__m128i)(index), \
4075 (__v4si)(__m128i)(v1), (int)(scale)); })
4229 return (__m128i) __builtin_ia32_vpermi2vard128_mask ((__v4si) __A, in _mm_mask2_permutex2var_epi32()
4230 (__v4si) __I in _mm_mask2_permutex2var_epi32()
4232 (__v4si) __B, in _mm_mask2_permutex2var_epi32()
4272 (__v4si) __I in _mm_mask2_permutex2var_ps()
4310 return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I in _mm_permutex2var_epi32()
4312 (__v4si) __A, in _mm_permutex2var_epi32()
4313 (__v4si) __B, in _mm_permutex2var_epi32()
4320 return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I in _mm_mask_permutex2var_epi32()
4322 (__v4si) __A, in _mm_mask_permutex2var_epi32()
4323 (__v4si) __B, in _mm_mask_permutex2var_epi32()
4330 return (__m128i) __builtin_ia32_vpermt2vard128_maskz ((__v4si) __I in _mm_maskz_permutex2var_epi32()
4332 (__v4si) __A, in _mm_maskz_permutex2var_epi32()
4333 (__v4si) __B, in _mm_maskz_permutex2var_epi32()
4434 return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I in _mm_permutex2var_ps()
4444 return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I in _mm_mask_permutex2var_ps()
4454 return (__m128) __builtin_ia32_vpermt2varps128_maskz ((__v4si) __I in _mm_maskz_permutex2var_ps()
4557 (__v4si) __W, in _mm_mask_cvtepi8_epi32()
4565 (__v4si) in _mm_maskz_cvtepi8_epi32()
4624 return (__m128i) __builtin_ia32_pmovsxdq128_mask ((__v4si) __X, in _mm_mask_cvtepi32_epi64()
4632 return (__m128i) __builtin_ia32_pmovsxdq128_mask ((__v4si) __X, in _mm_maskz_cvtepi32_epi64()
4641 return (__m256i) __builtin_ia32_pmovsxdq256_mask ((__v4si) __X, in _mm256_mask_cvtepi32_epi64()
4649 return (__m256i) __builtin_ia32_pmovsxdq256_mask ((__v4si) __X, in _mm256_maskz_cvtepi32_epi64()
4659 (__v4si) __W, in _mm_mask_cvtepi16_epi32()
4667 (__v4si) in _mm_maskz_cvtepi16_epi32()
4728 (__v4si) __W, in _mm_mask_cvtepu8_epi32()
4736 (__v4si) in _mm_maskz_cvtepu8_epi32()
4795 return (__m128i) __builtin_ia32_pmovzxdq128_mask ((__v4si) __X, in _mm_mask_cvtepu32_epi64()
4803 return (__m128i) __builtin_ia32_pmovzxdq128_mask ((__v4si) __X, in _mm_maskz_cvtepu32_epi64()
4812 return (__m256i) __builtin_ia32_pmovzxdq256_mask ((__v4si) __X, in _mm256_mask_cvtepu32_epi64()
4820 return (__m256i) __builtin_ia32_pmovzxdq256_mask ((__v4si) __X, in _mm256_maskz_cvtepu32_epi64()
4830 (__v4si) __W, in _mm_mask_cvtepu16_epi32()
4838 (__v4si) in _mm_maskz_cvtepu16_epi32()
4896 (__m128i)__builtin_ia32_prold128_mask((__v4si)(__m128i)(a), (int)(b), \
4897 (__v4si)_mm_setzero_si128(), \
4901 (__m128i)__builtin_ia32_prold128_mask((__v4si)(__m128i)(a), (int)(b), \
4902 (__v4si)(__m128i)(w), (__mmask8)(u)); })
4905 (__m128i)__builtin_ia32_prold128_mask((__v4si)(__m128i)(a), (int)(b), \
4906 (__v4si)_mm_setzero_si128(), \
4954 return (__m128i) __builtin_ia32_prolvd128_mask ((__v4si) __A, in _mm_rolv_epi32()
4955 (__v4si) __B, in _mm_rolv_epi32()
4956 (__v4si) in _mm_rolv_epi32()
4965 return (__m128i) __builtin_ia32_prolvd128_mask ((__v4si) __A, in _mm_mask_rolv_epi32()
4966 (__v4si) __B, in _mm_mask_rolv_epi32()
4967 (__v4si) __W, in _mm_mask_rolv_epi32()
4974 return (__m128i) __builtin_ia32_prolvd128_mask ((__v4si) __A, in _mm_maskz_rolv_epi32()
4975 (__v4si) __B, in _mm_maskz_rolv_epi32()
4976 (__v4si) in _mm_maskz_rolv_epi32()
5072 (__m128i)__builtin_ia32_prord128_mask((__v4si)(__m128i)(A), (int)(B), \
5073 (__v4si)_mm_setzero_si128(), \
5077 (__m128i)__builtin_ia32_prord128_mask((__v4si)(__m128i)(A), (int)(B), \
5078 (__v4si)(__m128i)(W), (__mmask8)(U)); })
5081 (__m128i)__builtin_ia32_prord128_mask((__v4si)(__m128i)(A), (int)(B), \
5082 (__v4si)_mm_setzero_si128(), \
5131 return (__m128i) __builtin_ia32_pslld128_mask ((__v4si) __A, in _mm_mask_sll_epi32()
5132 (__v4si) __B, in _mm_mask_sll_epi32()
5133 (__v4si) __W, in _mm_mask_sll_epi32()
5140 return (__m128i) __builtin_ia32_pslld128_mask ((__v4si) __A, in _mm_maskz_sll_epi32()
5141 (__v4si) __B, in _mm_maskz_sll_epi32()
5142 (__v4si) in _mm_maskz_sll_epi32()
5152 (__v4si) __B, in _mm256_mask_sll_epi32()
5161 (__v4si) __B, in _mm256_maskz_sll_epi32()
5168 (__m128i)__builtin_ia32_pslldi128_mask((__v4si)(__m128i)(A), (int)(B), \
5169 (__v4si)(__m128i)(W), \
5173 (__m128i)__builtin_ia32_pslldi128_mask((__v4si)(__m128i)(A), (int)(B), \
5174 (__v4si)_mm_setzero_si128(), \
5251 return (__m128i) __builtin_ia32_prorvd128_mask ((__v4si) __A, in _mm_rorv_epi32()
5252 (__v4si) __B, in _mm_rorv_epi32()
5253 (__v4si) in _mm_rorv_epi32()
5262 return (__m128i) __builtin_ia32_prorvd128_mask ((__v4si) __A, in _mm_mask_rorv_epi32()
5263 (__v4si) __B, in _mm_mask_rorv_epi32()
5264 (__v4si) __W, in _mm_mask_rorv_epi32()
5271 return (__m128i) __builtin_ia32_prorvd128_mask ((__v4si) __A, in _mm_maskz_rorv_epi32()
5272 (__v4si) __B, in _mm_maskz_rorv_epi32()
5273 (__v4si) in _mm_maskz_rorv_epi32()
5412 return (__m128i) __builtin_ia32_psllv4si_mask ((__v4si) __X, in _mm_mask_sllv_epi32()
5413 (__v4si) __Y, in _mm_mask_sllv_epi32()
5414 (__v4si) __W, in _mm_mask_sllv_epi32()
5421 return (__m128i) __builtin_ia32_psllv4si_mask ((__v4si) __X, in _mm_maskz_sllv_epi32()
5422 (__v4si) __Y, in _mm_maskz_sllv_epi32()
5423 (__v4si) in _mm_maskz_sllv_epi32()
5494 return (__m128i) __builtin_ia32_psrlv4si_mask ((__v4si) __X, in _mm_mask_srlv_epi32()
5495 (__v4si) __Y, in _mm_mask_srlv_epi32()
5496 (__v4si) __W, in _mm_mask_srlv_epi32()
5503 return (__m128i) __builtin_ia32_psrlv4si_mask ((__v4si) __X, in _mm_maskz_srlv_epi32()
5504 (__v4si) __Y, in _mm_maskz_srlv_epi32()
5505 (__v4si) in _mm_maskz_srlv_epi32()
5536 return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, in _mm_mask_srl_epi32()
5537 (__v4si) __B, in _mm_mask_srl_epi32()
5538 (__v4si) __W, in _mm_mask_srl_epi32()
5545 return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, in _mm_maskz_srl_epi32()
5546 (__v4si) __B, in _mm_maskz_srl_epi32()
5547 (__v4si) in _mm_maskz_srl_epi32()
5557 (__v4si) __B, in _mm256_mask_srl_epi32()
5566 (__v4si) __B, in _mm256_maskz_srl_epi32()
5573 (__m128i)__builtin_ia32_psrldi128_mask((__v4si)(__m128i)(A), (int)(imm), \
5574 (__v4si)(__m128i)(W), \
5578 (__m128i)__builtin_ia32_psrldi128_mask((__v4si)(__m128i)(A), (int)(imm), \
5579 (__v4si)_mm_setzero_si128(), \
5656 return (__m128i) __builtin_ia32_psrav4si_mask ((__v4si) __X, in _mm_mask_srav_epi32()
5657 (__v4si) __Y, in _mm_mask_srav_epi32()
5658 (__v4si) __W, in _mm_mask_srav_epi32()
5665 return (__m128i) __builtin_ia32_psrav4si_mask ((__v4si) __X, in _mm_maskz_srav_epi32()
5666 (__v4si) __Y, in _mm_maskz_srav_epi32()
5667 (__v4si) in _mm_maskz_srav_epi32()
5756 (__v4si) __A, in _mm_mask_mov_epi32()
5757 (__v4si) __W); in _mm_mask_mov_epi32()
5764 (__v4si) __A, in _mm_maskz_mov_epi32()
5765 (__v4si) _mm_setzero_si128 ()); in _mm_maskz_mov_epi32()
5788 return (__m128i) __builtin_ia32_movdqa32load128_mask ((__v4si *) __P, in _mm_mask_load_epi32()
5789 (__v4si) __W, in _mm_mask_load_epi32()
5797 return (__m128i) __builtin_ia32_movdqa32load128_mask ((__v4si *) __P, in _mm_maskz_load_epi32()
5798 (__v4si) in _mm_maskz_load_epi32()
5826 __builtin_ia32_movdqa32store128_mask ((__v4si *) __P, in _mm_mask_store_epi32()
5827 (__v4si) __A, in _mm_mask_store_epi32()
5960 (__v4si)(__m128i)(O), \
5965 (__v4si)_mm_setzero_si128(), \
6049 (__v4si)(__m128i)(C), (int)(imm), \
6055 (__v4si)(__m128i)(C), (int)(imm), \
6061 (__v4si)(__m128i)(C), (int)(imm), \
6187 return (__m128i) __builtin_ia32_loaddqusi128_mask ((__v4si *) __P, in _mm_mask_loadu_epi32()
6188 (__v4si) __W, in _mm_mask_loadu_epi32()
6195 return (__m128i) __builtin_ia32_loaddqusi128_mask ((__v4si *) __P, in _mm_maskz_loadu_epi32()
6196 (__v4si) in _mm_maskz_loadu_epi32()
6337 __builtin_ia32_storedqusi128_mask ((__v4si *) __P, in _mm_mask_storeu_epi32()
6338 (__v4si) __A, in _mm_mask_storeu_epi32()
6702 (__v4si) __C, in _mm_mask_permutevar_ps()
6711 (__v4si) __C, in _mm_maskz_permutevar_ps()
6740 return (__mmask8) __builtin_ia32_ptestmd128 ((__v4si) __A, in _mm_test_epi32_mask()
6741 (__v4si) __B, in _mm_test_epi32_mask()
6748 return (__mmask8) __builtin_ia32_ptestmd128 ((__v4si) __A, in _mm_mask_test_epi32_mask()
6749 (__v4si) __B, __U); in _mm_mask_test_epi32_mask()
6800 return (__mmask8) __builtin_ia32_ptestnmd128 ((__v4si) __A, in _mm_testn_epi32_mask()
6801 (__v4si) __B, in _mm_testn_epi32_mask()
6808 return (__mmask8) __builtin_ia32_ptestnmd128 ((__v4si) __A, in _mm_mask_testn_epi32_mask()
6809 (__v4si) __B, __U); in _mm_mask_testn_epi32_mask()
6863 (__v4si)_mm_unpackhi_epi32(__A, __B), in _mm_mask_unpackhi_epi32()
6864 (__v4si)__W); in _mm_mask_unpackhi_epi32()
6871 (__v4si)_mm_unpackhi_epi32(__A, __B), in _mm_maskz_unpackhi_epi32()
6872 (__v4si)_mm_setzero_si128()); in _mm_maskz_unpackhi_epi32()
6927 (__v4si)_mm_unpacklo_epi32(__A, __B), in _mm_mask_unpacklo_epi32()
6928 (__v4si)__W); in _mm_mask_unpacklo_epi32()
6935 (__v4si)_mm_unpacklo_epi32(__A, __B), in _mm_maskz_unpacklo_epi32()
6936 (__v4si)_mm_setzero_si128()); in _mm_maskz_unpacklo_epi32()
6991 return (__m128i) __builtin_ia32_psrad128_mask ((__v4si) __A, in _mm_mask_sra_epi32()
6992 (__v4si) __B, in _mm_mask_sra_epi32()
6993 (__v4si) __W, in _mm_mask_sra_epi32()
7000 return (__m128i) __builtin_ia32_psrad128_mask ((__v4si) __A, in _mm_maskz_sra_epi32()
7001 (__v4si) __B, in _mm_maskz_sra_epi32()
7002 (__v4si) in _mm_maskz_sra_epi32()
7012 (__v4si) __B, in _mm256_mask_sra_epi32()
7021 (__v4si) __B, in _mm256_maskz_sra_epi32()
7028 (__m128i)__builtin_ia32_psradi128_mask((__v4si)(__m128i)(A), (int)(imm), \
7029 (__v4si)(__m128i)(W), \
7033 (__m128i)__builtin_ia32_psradi128_mask((__v4si)(__m128i)(A), (int)(imm), \
7034 (__v4si)_mm_setzero_si128(), \
7138 (__m128i)__builtin_ia32_pternlogd128_mask((__v4si)(__m128i)(A), \
7139 (__v4si)(__m128i)(B), \
7140 (__v4si)(__m128i)(C), (int)(imm), \
7144 (__m128i)__builtin_ia32_pternlogd128_mask((__v4si)(__m128i)(A), \
7145 (__v4si)(__m128i)(B), \
7146 (__v4si)(__m128i)(C), (int)(imm), \
7150 (__m128i)__builtin_ia32_pternlogd128_maskz((__v4si)(__m128i)(A), \
7151 (__v4si)(__m128i)(B), \
7152 (__v4si)(__m128i)(C), (int)(imm), \
7463 return (__m256i) __builtin_ia32_broadcasti32x4_256_mask ((__v4si) __A, in _mm256_broadcast_i32x4()
7471 return (__m256i) __builtin_ia32_broadcasti32x4_256_mask ((__v4si) __A, in _mm256_mask_broadcast_i32x4()
7479 return (__m256i) __builtin_ia32_broadcasti32x4_256_mask ((__v4si) in _mm256_maskz_broadcast_i32x4()
7537 (__v4si) _mm_broadcastd_epi32(__A), in _mm_mask_broadcastd_epi32()
7538 (__v4si) __O); in _mm_mask_broadcastd_epi32()
7545 (__v4si) _mm_broadcastd_epi32(__A), in _mm_maskz_broadcastd_epi32()
7546 (__v4si) _mm_setzero_si128()); in _mm_maskz_broadcastd_epi32()
7600 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, in _mm_cvtsepi32_epi8()
7608 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, in _mm_mask_cvtsepi32_epi8()
7615 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, in _mm_maskz_cvtsepi32_epi8()
7623 __builtin_ia32_pmovsdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); in _mm_mask_cvtsepi32_storeu_epi8()
7658 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, in _mm_cvtsepi32_epi16()
7666 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, in _mm_mask_cvtsepi32_epi16()
7674 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, in _mm_maskz_cvtsepi32_epi16()
7682 __builtin_ia32_pmovsdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); in _mm_mask_cvtsepi32_storeu_epi16()
7776 (__v4si)_mm_undefined_si128(), in _mm_cvtsepi64_epi32()
7784 (__v4si) __O, __M); in _mm_mask_cvtsepi64_epi32()
7791 (__v4si) _mm_setzero_si128 (), in _mm_maskz_cvtsepi64_epi32()
7798 __builtin_ia32_pmovsqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); in _mm_mask_cvtsepi64_storeu_epi32()
7805 (__v4si)_mm_undefined_si128(), in _mm256_cvtsepi64_epi32()
7813 (__v4si)__O, in _mm256_mask_cvtsepi64_epi32()
7821 (__v4si) _mm_setzero_si128 (), in _mm256_maskz_cvtsepi64_epi32()
7828 __builtin_ia32_pmovsqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); in _mm256_mask_cvtsepi64_storeu_epi32()
7892 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, in _mm_cvtusepi32_epi8()
7900 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, in _mm_mask_cvtusepi32_epi8()
7908 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, in _mm_maskz_cvtusepi32_epi8()
7916 __builtin_ia32_pmovusdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); in _mm_mask_cvtusepi32_storeu_epi8()
7952 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, in _mm_cvtusepi32_epi16()
7960 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, in _mm_mask_cvtusepi32_epi16()
7967 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, in _mm_maskz_cvtusepi32_epi16()
7975 __builtin_ia32_pmovusdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); in _mm_mask_cvtusepi32_storeu_epi16()
8071 (__v4si)_mm_undefined_si128(), in _mm_cvtusepi64_epi32()
8079 (__v4si) __O, __M); in _mm_mask_cvtusepi64_epi32()
8086 (__v4si) _mm_setzero_si128 (), in _mm_maskz_cvtusepi64_epi32()
8093 __builtin_ia32_pmovusqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); in _mm_mask_cvtusepi64_storeu_epi32()
8100 (__v4si)_mm_undefined_si128(), in _mm256_cvtusepi64_epi32()
8108 (__v4si) __O, __M); in _mm256_mask_cvtusepi64_epi32()
8115 (__v4si) _mm_setzero_si128 (), in _mm256_maskz_cvtusepi64_epi32()
8122 __builtin_ia32_pmovusqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); in _mm256_mask_cvtusepi64_storeu_epi32()
8186 return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A, in _mm_cvtepi32_epi8()
8194 return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A, in _mm_mask_cvtepi32_epi8()
8201 return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A, in _mm_maskz_cvtepi32_epi8()
8210 __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); in _mm_mask_cvtepi32_storeu_epi8()
8245 return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A, in _mm_cvtepi32_epi16()
8253 return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A, in _mm_mask_cvtepi32_epi16()
8260 return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A, in _mm_maskz_cvtepi32_epi16()
8268 __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); in _mm_mask_cvtepi32_storeu_epi16()
8362 (__v4si)_mm_undefined_si128(), in _mm_cvtepi64_epi32()
8370 (__v4si) __O, __M); in _mm_mask_cvtepi64_epi32()
8377 (__v4si) _mm_setzero_si128 (), in _mm_maskz_cvtepi64_epi32()
8384 __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); in _mm_mask_cvtepi64_storeu_epi32()
8391 (__v4si) _mm_undefined_si128(), in _mm256_cvtepi64_epi32()
8399 (__v4si) __O, __M); in _mm256_mask_cvtepi64_epi32()
8406 (__v4si) _mm_setzero_si128 (), in _mm256_maskz_cvtepi64_epi32()
8413 __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); in _mm256_mask_cvtepi64_storeu_epi32()
8496 (__v4si)_mm_setzero_si128(), \
8502 (__v4si)(__m128i)(W), \
8508 (__v4si)_mm_setzero_si128(), \
8531 (__v4si)(__m128i)(B), \
8538 (__v4si)(__m128i)(B), \
8545 (__v4si)(__m128i)(B), \
8653 (__m128i)__builtin_ia32_gather3div4si((__v4si)(__m128i)(v1_old), \
8665 (__m128i)__builtin_ia32_gather3div8si((__v4si)(__m128i)(v1_old), \
8673 (__v4si)(__m128i)(index), \
8679 (__v4si)(__m128i)(index), \
8685 (__v4si)(__m128i)(index), \
8691 (__v4si)(__m128i)(index), \
8697 (__v4si)(__m128i)(index), \
8701 (__m128i)__builtin_ia32_gather3siv4si((__v4si)(__m128i)(v1_old), \
8703 (__v4si)(__m128i)(index), \
8863 (__m128i)__builtin_ia32_alignd128_mask((__v4si)(__m128i)(A), \
8864 (__v4si)(__m128i)(B), (int)(imm), \
8865 (__v4si)_mm_undefined_si128(), \
8869 (__m128i)__builtin_ia32_alignd128_mask((__v4si)(__m128i)(A), \
8870 (__v4si)(__m128i)(B), (int)(imm), \
8871 (__v4si)(__m128i)(W), \
8875 (__m128i)__builtin_ia32_alignd128_mask((__v4si)(__m128i)(A), \
8876 (__v4si)(__m128i)(B), (int)(imm), \
8877 (__v4si)_mm_setzero_si128(), \
9010 (__v4si)_mm_shuffle_epi32((A), (I)), \
9011 (__v4si)(__m128i)(W)); })
9015 (__v4si)_mm_shuffle_epi32((A), (I)), \
9016 (__v4si)_mm_setzero_si128()); })