Lines Matching refs:efx_nic_reg_field

2563 struct efx_nic_reg_field {  struct
2592 static const struct efx_nic_reg_field efx_nic_reg_fields_ADR_REGION[] = {
2598 static const struct efx_nic_reg_field efx_nic_reg_fields_INT_EN_KER[] = {
2604 static const struct efx_nic_reg_field efx_nic_reg_fields_INT_EN_CHAR[] = {
2610 static const struct efx_nic_reg_field efx_nic_reg_fields_INT_ADR_KER[] = {
2614 static const struct efx_nic_reg_field efx_nic_reg_fields_INT_ADR_CHAR[] = {
2618 static const struct efx_nic_reg_field efx_nic_reg_fields_HW_INIT[] = {
2642 static const struct efx_nic_reg_field efx_nic_reg_fields_USR_EV_CFG[] = {
2646 static const struct efx_nic_reg_field efx_nic_reg_fields_EE_SPI_HCMD[] = {
2656 static const struct efx_nic_reg_field efx_nic_reg_fields_EE_SPI_HADR[] = {
2660 static const struct efx_nic_reg_field efx_nic_reg_fields_EE_SPI_HDATA[] = {
2666 static const struct efx_nic_reg_field efx_nic_reg_fields_EE_BASE_PAGE[] = {
2670 static const struct efx_nic_reg_field efx_nic_reg_fields_EE_VPD_CFG0[] = {
2688 static const struct efx_nic_reg_field efx_nic_reg_fields_NIC_STAT[] = {
2699 static const struct efx_nic_reg_field efx_nic_reg_fields_GPIO_CTL[] = {
2771 static const struct efx_nic_reg_field efx_nic_reg_fields_GLB_CTL[] = {
2811 static const struct efx_nic_reg_field efx_nic_reg_fields_DP_CTRL[] = {
2814 static const struct efx_nic_reg_field efx_nic_reg_fields_MEM_STAT[] = {
2820 static const struct efx_nic_reg_field efx_nic_reg_fields_CS_DEBUG[] = {
2825 static const struct efx_nic_reg_field efx_nic_reg_fields_ALTERA_BUILD[] = {
2828 static const struct efx_nic_reg_field efx_nic_reg_fields_CSR_SPARE[] = {
2834 static const struct efx_nic_reg_field efx_nic_reg_fields_PCIE_SD_CTL0123[] = {
2857 static const struct efx_nic_reg_field efx_nic_reg_fields_PCIE_SD_CTL45[] = {
2875 static const struct efx_nic_reg_field efx_nic_reg_fields_PCIE_PCS_CTL_STAT[] = {
2890 static const struct efx_nic_reg_field efx_nic_reg_fields_EVQ_CTL[] = {
2897 static const struct efx_nic_reg_field efx_nic_reg_fields_EVQ_CNT1[] = {
2906 static const struct efx_nic_reg_field efx_nic_reg_fields_EVQ_CNT2[] = {
2915 static const struct efx_nic_reg_field efx_nic_reg_fields_BUF_TBL_CFG[] = {
2918 static const struct efx_nic_reg_field efx_nic_reg_fields_SRM_RX_DC_CFG[] = {
2922 static const struct efx_nic_reg_field efx_nic_reg_fields_SRM_TX_DC_CFG[] = {
2925 static const struct efx_nic_reg_field efx_nic_reg_fields_SRM_CFG[] = {
2932 static const struct efx_nic_reg_field efx_nic_reg_fields_SRM_UPD_EVQ[] = {
2935 static const struct efx_nic_reg_field efx_nic_reg_fields_SRAM_PARITY[] = {
2942 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_CFG[] = {
2973 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_FILTER_CTL[] = {
2991 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_DC_CFG[] = {
2995 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_DC_PF_WM[] = {
2999 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_RSS_TKEY[] = {
3003 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_SELF_RST[] = {
3011 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_RSS_IPV6_REG1[] = {
3014 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_RSS_IPV6_REG2[] = {
3017 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_RSS_IPV6_REG3[] = {
3023 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_DC_CFG[] = {
3026 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_CHKSM_CFG[] = {
3032 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_CFG[] = {
3051 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_RESERVED[] = {
3080 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_PACE[] = {
3086 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_VLAN[] = {
3113 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_IPFIL_PORTEN[] = {
3148 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_IPFIL_TBL[] = {
3154 static const struct efx_nic_reg_field efx_nic_reg_fields_MD_TXD[] = {
3157 static const struct efx_nic_reg_field efx_nic_reg_fields_MD_RXD[] = {
3160 static const struct efx_nic_reg_field efx_nic_reg_fields_MD_CS[] = {
3173 static const struct efx_nic_reg_field efx_nic_reg_fields_MD_PHY_ADR[] = {
3176 static const struct efx_nic_reg_field efx_nic_reg_fields_MD_ID[] = {
3180 static const struct efx_nic_reg_field efx_nic_reg_fields_MAC_STAT_DMA[] = {
3184 static const struct efx_nic_reg_field efx_nic_reg_fields_MAC_CTRL[] = {
3193 static const struct efx_nic_reg_field efx_nic_reg_fields_GEN_MODE[] = {
3199 static const struct efx_nic_reg_field efx_nic_reg_fields_MAC_MC_HASH_REG0[] = {
3202 static const struct efx_nic_reg_field efx_nic_reg_fields_MAC_MC_HASH_REG1[] = {
3205 static const struct efx_nic_reg_field efx_nic_reg_fields_GM_CFG1[] = {
3220 static const struct efx_nic_reg_field efx_nic_reg_fields_GM_CFG2[] = {
3229 static const struct efx_nic_reg_field efx_nic_reg_fields_GM_MAX_FLEN[] = {
3232 static const struct efx_nic_reg_field efx_nic_reg_fields_GM_ADR1[] = {
3238 static const struct efx_nic_reg_field efx_nic_reg_fields_GM_ADR2[] = {
3242 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG0[] = {
3259 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG1[] = {
3263 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG2[] = {
3267 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG3[] = {
3271 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG4[] = {
3274 static const struct efx_nic_reg_field efx_nic_reg_fields_GMF_CFG5[] = {
3282 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_SRC_MAC_TBL[] = {
3286 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_SRC_MAC_CTL[] = {
3292 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_ADR_LO[] = {
3295 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_ADR_HI[] = {
3298 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_GLB_CFG[] = {
3308 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_TX_CFG[] = {
3319 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_RX_CFG[] = {
3332 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_MGT_INT_MASK[] = {
3340 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_FC[] = {
3351 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_PAUSE_TIME[] = {
3355 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_TX_PARAM[] = {
3361 static const struct efx_nic_reg_field efx_nic_reg_fields_XM_RX_PARAM[] = {
3365 static const struct efx_nic_reg_field efx_nic_reg_fields_XX_PWR_RST[] = {
3394 static const struct efx_nic_reg_field efx_nic_reg_fields_XX_SD_CTL[] = {
3410 static const struct efx_nic_reg_field efx_nic_reg_fields_XX_TXDRV_CTL[] = {
3420 static const struct efx_nic_reg_field efx_nic_reg_fields_BIU_HW_REV_ID[] = {
3423 static const struct efx_nic_reg_field efx_nic_reg_fields_MC_DB_LWRD[] = {
3426 static const struct efx_nic_reg_field efx_nic_reg_fields_MC_DB_HWRD[] = {
3429 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_DESC_PTR_TBL[] = {
3449 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_DESC_PTR_TBL[] = {
3472 static const struct efx_nic_reg_field efx_nic_reg_fields_EVQ_PTR_TBL[] = {
3482 static const struct efx_nic_reg_field efx_nic_reg_fields_BUF_FULL_TBL[] = {
3490 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_FILTER_TBL0[] = {
3503 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_MAC_FILTER_TBL0[] = {
3512 static const struct efx_nic_reg_field efx_nic_reg_fields_TIMER_TBL[] = {
3523 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_PACE_TBL[] = {
3526 static const struct efx_nic_reg_field efx_nic_reg_fields_RX_INDIRECTION_TBL[] = {
3529 static const struct efx_nic_reg_field efx_nic_reg_fields_TX_MAC_FILTER_TBL0[] = {
3535 static const struct efx_nic_reg_field efx_nic_reg_fields_MC_TREG_SMEM[] = {
3538 static const struct efx_nic_reg_field efx_nic_reg_fields_BIU_MC_SFT_STATUS[] = {
3544 	const struct efx_nic_reg_field *fields;
3676 	const struct efx_nic_reg_field *fields;
3743 static size_t column_width(const struct efx_nic_reg_field *field)  in column_width()
3753 static size_t column_padding(const struct efx_nic_reg_field *field)  in column_padding()
3764 print_field_value(const struct efx_nic_reg_field *field, const u8 *buf)  in print_field_value()
3789 	const struct efx_nic_reg_field *field;  in print_single_register()
3813 	const struct efx_nic_reg_field *field = &table->fields[0];  in print_simple_table()
3847 	const struct efx_nic_reg_field *field;  in print_complex_table()