Lines Matching refs:A2_OFFSET_TO_U16
124 #define A2_OFFSET_TO_U16(offset) \ macro
133 ((__s16)A2_OFFSET_TO_U16(offset))
144 #define A2_OFFSET_TO_TEMP(offset) ((__s16)A2_OFFSET_TO_U16(offset))
148 sd->bias_cur[MCURR] = A2_OFFSET_TO_U16(SFF_A2_BIAS); in sff8472_dom_parse()
149 sd->bias_cur[HALRM] = A2_OFFSET_TO_U16(SFF_A2_BIAS_HALRM); in sff8472_dom_parse()
150 sd->bias_cur[LALRM] = A2_OFFSET_TO_U16(SFF_A2_BIAS_LALRM); in sff8472_dom_parse()
151 sd->bias_cur[HWARN] = A2_OFFSET_TO_U16(SFF_A2_BIAS_HWARN); in sff8472_dom_parse()
152 sd->bias_cur[LWARN] = A2_OFFSET_TO_U16(SFF_A2_BIAS_LWARN); in sff8472_dom_parse()
154 sd->sfp_voltage[MCURR] = A2_OFFSET_TO_U16(SFF_A2_VCC); in sff8472_dom_parse()
155 sd->sfp_voltage[HALRM] = A2_OFFSET_TO_U16(SFF_A2_VCC_HALRM); in sff8472_dom_parse()
156 sd->sfp_voltage[LALRM] = A2_OFFSET_TO_U16(SFF_A2_VCC_LALRM); in sff8472_dom_parse()
157 sd->sfp_voltage[HWARN] = A2_OFFSET_TO_U16(SFF_A2_VCC_HWARN); in sff8472_dom_parse()
158 sd->sfp_voltage[LWARN] = A2_OFFSET_TO_U16(SFF_A2_VCC_LWARN); in sff8472_dom_parse()
160 sd->tx_power[MCURR] = A2_OFFSET_TO_U16(SFF_A2_TX_PWR); in sff8472_dom_parse()
161 sd->tx_power[HALRM] = A2_OFFSET_TO_U16(SFF_A2_TX_PWR_HALRM); in sff8472_dom_parse()
162 sd->tx_power[LALRM] = A2_OFFSET_TO_U16(SFF_A2_TX_PWR_LALRM); in sff8472_dom_parse()
163 sd->tx_power[HWARN] = A2_OFFSET_TO_U16(SFF_A2_TX_PWR_HWARN); in sff8472_dom_parse()
164 sd->tx_power[LWARN] = A2_OFFSET_TO_U16(SFF_A2_TX_PWR_LWARN); in sff8472_dom_parse()
166 sd->rx_power[MCURR] = A2_OFFSET_TO_U16(SFF_A2_RX_PWR); in sff8472_dom_parse()
167 sd->rx_power[HALRM] = A2_OFFSET_TO_U16(SFF_A2_RX_PWR_HALRM); in sff8472_dom_parse()
168 sd->rx_power[LALRM] = A2_OFFSET_TO_U16(SFF_A2_RX_PWR_LALRM); in sff8472_dom_parse()
169 sd->rx_power[HWARN] = A2_OFFSET_TO_U16(SFF_A2_RX_PWR_HWARN); in sff8472_dom_parse()
170 sd->rx_power[LWARN] = A2_OFFSET_TO_U16(SFF_A2_RX_PWR_LWARN); in sff8472_dom_parse()