11 	fprintf(stdout, "offset 0x50, ID_REV       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
12 	fprintf(stdout, "offset 0x54, INT_CFG      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
13 	fprintf(stdout, "offset 0x58, INT_STS      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
14 	fprintf(stdout, "offset 0x5C, INT_EN       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
15 	fprintf(stdout, "offset 0x60, RESERVED     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
16 	fprintf(stdout, "offset 0x64, BYTE_TEST    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
17 	fprintf(stdout, "offset 0x68, FIFO_INT     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
18 	fprintf(stdout, "offset 0x6C, RX_CFG       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
19 	fprintf(stdout, "offset 0x70, TX_CFG       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
20 	fprintf(stdout, "offset 0x74, HW_CFG       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
21 	fprintf(stdout, "offset 0x78, RX_DP_CTRL   = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
22 	fprintf(stdout, "offset 0x7C, RX_FIFO_INF  = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
23 	fprintf(stdout, "offset 0x80, TX_FIFO_INF  = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
24 	fprintf(stdout, "offset 0x84, PMT_CTRL     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
25 	fprintf(stdout, "offset 0x88, GPIO_CFG     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
26 	fprintf(stdout, "offset 0x8C, GPT_CFG      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
27 	fprintf(stdout, "offset 0x90, GPT_CNT      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
28 	fprintf(stdout, "offset 0x94, FPGA_REV     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
29 	fprintf(stdout, "offset 0x98, ENDIAN       = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
30 	fprintf(stdout, "offset 0x9C, FREE_RUN     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
31 	fprintf(stdout, "offset 0xA0, RX_DROP      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
32 	fprintf(stdout, "offset 0xA4, MAC_CSR_CMD  = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
33 	fprintf(stdout, "offset 0xA8, MAC_CSR_DATA = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
34 	fprintf(stdout, "offset 0xAC, AFC_CFG      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
35 	fprintf(stdout, "offset 0xB0, E2P_CMD      = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
36 	fprintf(stdout, "offset 0xB4, E2P_DATA     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
40 	fprintf(stdout, "index 1, MAC_CR   = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
41 	fprintf(stdout, "index 2, ADDRH    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
42 	fprintf(stdout, "index 3, ADDRL    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
43 	fprintf(stdout, "index 4, HASHH    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
44 	fprintf(stdout, "index 5, HASHL    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
45 	fprintf(stdout, "index 6, MII_ACC  = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
46 	fprintf(stdout, "index 7, MII_DATA = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
47 	fprintf(stdout, "index 8, FLOW     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
48 	fprintf(stdout, "index 9, VLAN1    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
49 	fprintf(stdout, "index A, VLAN2    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
50 	fprintf(stdout, "index B, WUFF     = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()
51 	fprintf(stdout, "index C, WUCSR    = 0x%08X\n",*smsc_reg++);  in smsc911x_dump_regs()