64 	VCS1,  enumerator
278 	[VCS1] = "VCS1",
542 	enum intel_engine_id engine = VCS1;  in fill_engines_id_class()
594 	case VCS1:  in get_engine()
597 		ci.engine_instance = find_physical_instance(VCS, engine - VCS1);  in get_engine()
627 		if (engine != VCS && engine != VCS1 && engine != VCS2 &&  in parse_engine_map()
1206 	[VCS1] = I915_EXEC_BSD | I915_EXEC_BSD_RING1,
1341 	if (flags & SWAPVCS && engine == VCS1)  in alloc_step_batch()
1344 		engine = VCS1;  in alloc_step_batch()
1878 	const enum intel_engine_id vcs_engines[2] = { VCS1, VCS2 };  in get_vcs_engine()  enumerator
1979 	if (qd[VCS1] < qd[VCS2])  in __qd_select_engine()
1981 	else if (qd[VCS1] > qd[VCS2])  in __qd_select_engine()
2001 	qd[VCS1] = balancer->get_qd(balancer, wrk, VCS1);  in __qd_balance()
2002 	wrk->qd_sum[VCS1] += qd[VCS1];  in __qd_balance()
2011 	       wrk->id, qd[VCS1], qd[VCS2], wrk->vcs_rr, engine,  in __qd_balance()
2012 	       current_seqno(wrk, VCS1), current_gpu_seqno(wrk, VCS1),  in __qd_balance()
2041 	for (engine = VCS1; engine <= VCS2; engine++) {  in qdavg_balance()
2052 	       wrk->id, qd[VCS1], qd[VCS2], wrk->vcs_rr, engine,  in qdavg_balance()
2053 	       current_seqno(wrk, VCS1), current_gpu_seqno(wrk, VCS1),  in qdavg_balance()
2062 	qd[VCS1] >>= 10;  in __rt_select_engine()
2104 	for (engine = VCS1; engine <= VCS2; engine++) {  in __rt_balance()
2154 	for (engine = VCS1; engine <= VCS2; engine++) {  in rtavg_balance()
2257 		{ I915_ENGINE_CLASS_VIDEO, 0, VCS1 },  in busy_init()
2884 			       wrk->nr_bb[VCS], wrk->nr_bb[VCS1], wrk->nr_bb[VCS2]);  in run_workload()
2887 			       (double)wrk->qd_sum[VCS1] / wrk->nr_bb[VCS],  in run_workload()