100 	return IS_GEN5(devid) ? 256 : 32;  in gen4_max_vs_nr_urb_entries()
105 	return IS_GEN5(devid) ? 128 : 64;  in gen4_max_sf_nr_urb_entries()
110 	return IS_GEN5(devid) ? 1024 : IS_G4X(devid) ? 384 : 256;  in gen4_urb_size()
115 	return IS_GEN5(devid) ? 48 : 24;  in gen4_max_sf_threads()
120 	return IS_GEN5(devid) ? 72 : IS_G4X(devid) ? 50 : 32;  in gen4_max_wm_threads()
211 	if (IS_GEN5(batch->devid)) {  in gen4_emit_state_base_address()
297 	if (IS_G4X(batch->devid) || IS_GEN5(batch->devid)) {  in gen4_emit_null_depth_buffer()
314 	if (IS_GEN5(batch->devid)) {  in gen4_emit_null_depth_buffer()
325 	if (IS_GEN5(batch->devid) || IS_G4X(batch->devid))  in gen4_emit_invariant()
341 	if (IS_GEN5(batch->devid))  in gen4_create_vs_state()
403 	if (IS_GEN5(batch->devid))  in gen4_create_wm_state()
439 	if (IS_GEN5(batch->devid)) {  in gen4_emit_vertex_elements()
535 	if (IS_GEN5(batch->devid))  in gen4_create_sf_kernel()
548 	if (IS_GEN5(batch->devid))  in gen4_create_ps_kernel()
620 	if (IS_GEN5(batch->devid))  in gen4_emit_vertex_buffer()