Lines Matching refs:DESCALE_P1
64 #define DESCALE_P1 (CONST_BITS - PASS1_BITS) macro
151 col2 = vcombine_s16(vrshrn_n_s32(col2_scaled_l, DESCALE_P1), in jsimd_fdct_islow_neon()
152 vrshrn_n_s32(col2_scaled_h, DESCALE_P1)); in jsimd_fdct_islow_neon()
158 col6 = vcombine_s16(vrshrn_n_s32(col6_scaled_l, DESCALE_P1), in jsimd_fdct_islow_neon()
159 vrshrn_n_s32(col6_scaled_h, DESCALE_P1)); in jsimd_fdct_islow_neon()
207 col7 = vcombine_s16(vrshrn_n_s32(tmp4_l, DESCALE_P1), in jsimd_fdct_islow_neon()
208 vrshrn_n_s32(tmp4_h, DESCALE_P1)); in jsimd_fdct_islow_neon()
214 col5 = vcombine_s16(vrshrn_n_s32(tmp5_l, DESCALE_P1), in jsimd_fdct_islow_neon()
215 vrshrn_n_s32(tmp5_h, DESCALE_P1)); in jsimd_fdct_islow_neon()
221 col3 = vcombine_s16(vrshrn_n_s32(tmp6_l, DESCALE_P1), in jsimd_fdct_islow_neon()
222 vrshrn_n_s32(tmp6_h, DESCALE_P1)); in jsimd_fdct_islow_neon()
228 col1 = vcombine_s16(vrshrn_n_s32(tmp7_l, DESCALE_P1), in jsimd_fdct_islow_neon()
229 vrshrn_n_s32(tmp7_h, DESCALE_P1)); in jsimd_fdct_islow_neon()