Lines Matching refs:OutputBecomesInput

11283   bool OutputBecomesInput = false;  in getNDSWDS()  local
11289 OutputBecomesInput = true; in getNDSWDS()
11308 OutputBecomesInput); in getNDSWDS()
11350 StringRef MangledName, bool OutputBecomesInput, in addAArch64VectorName() argument
11355 if (OutputBecomesInput) in addAArch64VectorName()
11366 bool OutputBecomesInput, in addAArch64AdvSIMDNDSNames() argument
11371 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11373 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11377 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11379 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11383 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11385 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11390 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11408 const bool OutputBecomesInput = std::get<2>(Data); in emitAArch64DeclareSimdFunction() local
11452 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11460 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11462 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11466 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11470 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11480 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11489 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11491 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11495 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11499 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()