Lines Matching refs:IsRegCall

1762   bool IsRegCall = State.CC == llvm::CallingConv::X86_RegCall;  in classifyArgumentType()  local
1784 if ((IsRegCall || IsVectorCall) && in classifyArgumentType()
1840 IsFastCall || IsVectorCall || IsRegCall, PaddingType); in classifyArgumentType()
2392 bool IsVectorCall, bool IsRegCall) const;
2396 bool IsVectorCall, bool IsRegCall) const;
3857 bool IsRegCall = CallingConv == llvm::CallingConv::X86_RegCall; in computeInfo() local
3860 unsigned FreeIntRegs = IsRegCall ? 11 : 6; in computeInfo()
3861 unsigned FreeSSERegs = IsRegCall ? 16 : 8; in computeInfo()
3865 if (IsRegCall && FI.getReturnType()->getTypePtr()->isRecordType() && in computeInfo()
3875 } else if (IsRegCall && FI.getReturnType()->getAs<ComplexType>() && in computeInfo()
3904 if (IsRegCall && it->type->isStructureOrClassType()) in computeInfo()
4172 bool IsRegCall) const { in classify()
4200 if ((IsVectorCall || IsRegCall) && in classify()
4202 if (IsRegCall) { in classify()
4294 bool IsRegCall) const { in computeVectorCallArgs()
4300 I.info = classify(I.type, FreeSSERegs, false, IsVectorCall, IsRegCall); in computeVectorCallArgs()
4306 IsVectorCall, IsRegCall); in computeVectorCallArgs()
4319 bool IsRegCall = CC == llvm::CallingConv::X86_RegCall; in computeInfo() local
4333 } else if (IsRegCall) { in computeInfo()
4340 IsVectorCall, IsRegCall); in computeInfo()
4345 } else if (IsRegCall) { in computeInfo()
4351 computeVectorCallArgs(FI, FreeSSERegs, IsVectorCall, IsRegCall); in computeInfo()
4354 I.info = classify(I.type, FreeSSERegs, false, IsVectorCall, IsRegCall); in computeInfo()