Lines Matching full:rev
12 …// CHECK-BE: [[REV:%.*]] = shufflevector <8 x i8> %src, <8 x i8> %src, <8 x i32> <i32 7, i32 6, i3… in test_vdupb_lane_s8()
13 // CHECK-BE: extractelement <8 x i8> [[REV]], i32 2 in test_vdupb_lane_s8()
22 …// CHECK-BE: [[REV:%.*]] = shufflevector <8 x i8> %src, <8 x i8> %src, <8 x i32> <i32 7, i32 6, i3… in test_vdupb_lane_u8()
23 // CHECK-BE: extractelement <8 x i8> [[REV]], i32 2 in test_vdupb_lane_u8()
32 …// CHECK-BE: [[REV:%.*]] = shufflevector <4 x i16> %src, <4 x i16> %src, <4 x i32> <i32 3, i32 2, … in test_vduph_lane_s16()
33 // CHECK-BE: extractelement <4 x i16> [[REV]], i32 2 in test_vduph_lane_s16()
42 …// CHECK-BE: [[REV:%.*]] = shufflevector <4 x i16> %src, <4 x i16> %src, <4 x i32> <i32 3, i32 2, … in test_vduph_lane_u16()
43 // CHECK-BE: extractelement <4 x i16> [[REV]], i32 2 in test_vduph_lane_u16()
52 // CHECK-BE: [[REV:%.*]] = shufflevector <2 x i32> %src, <2 x i32> %src, <2 x i32> <i32 1, i32 0> in test_vdups_lane_s32()
53 // CHECK-BE: extractelement <2 x i32> [[REV]], i32 0 in test_vdups_lane_s32()
62 // CHECK-BE: [[REV:%.*]] = shufflevector <2 x i32> %src, <2 x i32> %src, <2 x i32> <i32 1, i32 0> in test_vdups_lane_u32()
63 // CHECK-BE: extractelement <2 x i32> [[REV]], i32 0 in test_vdups_lane_u32()
72 …// CHECK-BE: [[REV:%.*]] = shufflevector <2 x float> %src, <2 x float> %src, <2 x i32> <i32 1, i32… in test_vdups_lane_f32()
73 // CHECK-BE: extractelement <2 x float> [[REV]], i32 0 in test_vdups_lane_f32()