Lines Matching refs:instr
55 static bool isADRP(uint32_t instr) { in isADRP() argument
56 return (instr & 0x9f000000) == 0x90000000; in isADRP()
65 static bool isLoadStoreClass(uint32_t instr) { in isLoadStoreClass() argument
66 return (instr & 0x0a000000) == 0x08000000; in isLoadStoreClass()
81 static bool isST1MultipleOpcode(uint32_t instr) { in isST1MultipleOpcode() argument
82 return (instr & 0x0000f000) == 0x00002000 || in isST1MultipleOpcode()
83 (instr & 0x0000f000) == 0x00006000 || in isST1MultipleOpcode()
84 (instr & 0x0000f000) == 0x00007000 || in isST1MultipleOpcode()
85 (instr & 0x0000f000) == 0x0000a000; in isST1MultipleOpcode()
88 static bool isST1Multiple(uint32_t instr) { in isST1Multiple() argument
89 return (instr & 0xbfff0000) == 0x0c000000 && isST1MultipleOpcode(instr); in isST1Multiple()
93 static bool isST1MultiplePost(uint32_t instr) { in isST1MultiplePost() argument
94 return (instr & 0xbfe00000) == 0x0c800000 && isST1MultipleOpcode(instr); in isST1MultiplePost()
109 static bool isST1SingleOpcode(uint32_t instr) { in isST1SingleOpcode() argument
110 return (instr & 0x0040e000) == 0x00000000 || in isST1SingleOpcode()
111 (instr & 0x0040e000) == 0x00004000 || in isST1SingleOpcode()
112 (instr & 0x0040e000) == 0x00008000; in isST1SingleOpcode()
115 static bool isST1Single(uint32_t instr) { in isST1Single() argument
116 return (instr & 0xbfff0000) == 0x0d000000 && isST1SingleOpcode(instr); in isST1Single()
120 static bool isST1SinglePost(uint32_t instr) { in isST1SinglePost() argument
121 return (instr & 0xbfe00000) == 0x0d800000 && isST1SingleOpcode(instr); in isST1SinglePost()
124 static bool isST1(uint32_t instr) { in isST1() argument
125 return isST1Multiple(instr) || isST1MultiplePost(instr) || in isST1()
126 isST1Single(instr) || isST1SinglePost(instr); in isST1()
132 static bool isLoadStoreExclusive(uint32_t instr) { in isLoadStoreExclusive() argument
133 return (instr & 0x3f000000) == 0x08000000; in isLoadStoreExclusive()
136 static bool isLoadExclusive(uint32_t instr) { in isLoadExclusive() argument
137 return (instr & 0x3f400000) == 0x08400000; in isLoadExclusive()
142 static bool isLoadLiteral(uint32_t instr) { in isLoadLiteral() argument
143 return (instr & 0x3b000000) == 0x18000000; in isLoadLiteral()
151 static bool isSTNP(uint32_t instr) { in isSTNP() argument
152 return (instr & 0x3bc00000) == 0x28000000; in isSTNP()
160 static bool isSTPPost(uint32_t instr) { in isSTPPost() argument
161 return (instr & 0x3bc00000) == 0x28800000; in isSTPPost()
166 static bool isSTPOffset(uint32_t instr) { in isSTPOffset() argument
167 return (instr & 0x3bc00000) == 0x29000000; in isSTPOffset()
173 static bool isSTPPre(uint32_t instr) { in isSTPPre() argument
174 return (instr & 0x3bc00000) == 0x29800000; in isSTPPre()
177 static bool isSTP(uint32_t instr) { in isSTP() argument
178 return isSTPPost(instr) || isSTPOffset(instr) || isSTPPre(instr); in isSTP()
184 static bool isLoadStoreUnscaled(uint32_t instr) { in isLoadStoreUnscaled() argument
185 return (instr & 0x3b000c00) == 0x38000000; in isLoadStoreUnscaled()
190 static bool isLoadStoreImmediatePost(uint32_t instr) { in isLoadStoreImmediatePost() argument
191 return (instr & 0x3b200c00) == 0x38000400; in isLoadStoreImmediatePost()
196 static bool isLoadStoreUnpriv(uint32_t instr) { in isLoadStoreUnpriv() argument
197 return (instr & 0x3b200c00) == 0x38000800; in isLoadStoreUnpriv()
202 static bool isLoadStoreImmediatePre(uint32_t instr) { in isLoadStoreImmediatePre() argument
203 return (instr & 0x3b200c00) == 0x38000c00; in isLoadStoreImmediatePre()
208 static bool isLoadStoreRegisterOff(uint32_t instr) { in isLoadStoreRegisterOff() argument
209 return (instr & 0x3b200c00) == 0x38200800; in isLoadStoreRegisterOff()
214 static bool isLoadStoreRegisterUnsigned(uint32_t instr) { in isLoadStoreRegisterUnsigned() argument
215 return (instr & 0x3b000000) == 0x39000000; in isLoadStoreRegisterUnsigned()
219 static uint32_t getRt(uint32_t instr) { return (instr & 0x1f); } in getRt() argument
222 static uint32_t getRn(uint32_t instr) { return (instr >> 5) & 0x1f; } in getRn() argument
231 static bool isBranch(uint32_t instr) { in isBranch() argument
232 return ((instr & 0xfe000000) == 0xd6000000) || // Cond branch. in isBranch()
233 ((instr & 0xfe000000) == 0x54000000) || // Uncond branch reg. in isBranch()
234 ((instr & 0x7c000000) == 0x14000000) || // Uncond branch imm. in isBranch()
235 ((instr & 0x7c000000) == 0x34000000); // Compare and test branch. in isBranch()
238 static bool isV8SingleRegisterNonStructureLoadStore(uint32_t instr) { in isV8SingleRegisterNonStructureLoadStore() argument
239 return isLoadStoreUnscaled(instr) || isLoadStoreImmediatePost(instr) || in isV8SingleRegisterNonStructureLoadStore()
240 isLoadStoreUnpriv(instr) || isLoadStoreImmediatePre(instr) || in isV8SingleRegisterNonStructureLoadStore()
241 isLoadStoreRegisterOff(instr) || isLoadStoreRegisterUnsigned(instr); in isV8SingleRegisterNonStructureLoadStore()
248 static bool isV8NonStructureLoad(uint32_t instr) { in isV8NonStructureLoad() argument
249 if (isLoadExclusive(instr)) in isV8NonStructureLoad()
251 if (isLoadLiteral(instr)) in isV8NonStructureLoad()
253 else if (isV8SingleRegisterNonStructureLoadStore(instr)) { in isV8NonStructureLoad()
256 uint32_t size = (instr >> 30) & 0xff; in isV8NonStructureLoad()
257 uint32_t v = (instr >> 26) & 0x1; in isV8NonStructureLoad()
258 uint32_t opc = (instr >> 22) & 0x3; in isV8NonStructureLoad()
274 static bool hasWriteback(uint32_t instr) { in hasWriteback() argument
275 return isLoadStoreImmediatePre(instr) || isLoadStoreImmediatePost(instr) || in hasWriteback()
276 isSTPPre(instr) || isSTPPost(instr) || isST1SinglePost(instr) || in hasWriteback()
277 isST1MultiplePost(instr); in hasWriteback()
283 static bool doesLoadStoreWriteToReg(uint32_t instr, uint32_t reg) { in doesLoadStoreWriteToReg() argument
284 return (isV8NonStructureLoad(instr) && getRt(instr) == reg) || in doesLoadStoreWriteToReg()
285 (hasWriteback(instr) && getRn(instr) == reg); in doesLoadStoreWriteToReg()