Lines Matching refs:MemA

909                     MemA[address,4] = bits(32) UNKNOWN;  in EmulatePUSH()
911 MemA[address,4] = R[i]; in EmulatePUSH()
917 MemA[address,4] = PCStoreValue(); in EmulatePUSH()
1026 … R[i] = if UnalignedAllowed then MemU[address,4] else MemA[address,4]; address = address + 4; in EmulatePOP()
1031 LoadWritePC(MemA[address,4]); in EmulatePOP()
2565 MemA[address,4] = S[d+r]; address = address+4; in EmulateVPUSH()
2570 MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; in EmulateVPUSH()
2571 MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; in EmulateVPUSH()
2658 S[d+r] = MemA[address,4]; address = address+4; in EmulateVPOP()
2661 word1 = MemA[address,4]; word2 = MemA[address+4,4]; address = address+8; in EmulateVPOP()
3921 R[i] = MemA[address, 4]; address = address + 4; in EmulateLDM()
3923 LoadWritePC (MemA[address, 4]); in EmulateLDM()
4064 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMDA()
4067 LoadWritePC(MemA[address,4]); in EmulateLDMDA()
4181 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMDB()
4183 LoadWritePC(MemA[address,4]); in EmulateLDMDB()
4319 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMIB()
4321 LoadWritePC(MemA[address,4]); in EmulateLDMIB()
4595 MemA[address,4] = bits(32) UNKNOWN; // Only possible for encodings T1 and A1 in EmulateSTM()
4597 MemA[address,4] = R[i]; in EmulateSTM()
4601 MemA[address,4] = PCStoreValue(); in EmulateSTM()
4747 MemA[address,4] = bits(32) UNKNOWN; in EmulateSTMDA()
4749 MemA[address,4] = R[i]; in EmulateSTMDA()
4753 MemA[address,4] = PCStoreValue(); in EmulateSTMDA()
4869 MemA[address,4] = bits(32) UNKNOWN; // Only possible for encoding A1 in EmulateSTMDB()
4871 MemA[address,4] = R[i]; in EmulateSTMDB()
4875 MemA[address,4] = PCStoreValue(); in EmulateSTMDB()
5018 MemA[address,4] = bits(32) UNKNOWN; in EmulateSTMIB()
5020 MemA[address,4] = R[i]; in EmulateSTMIB()
5024 MemA[address,4] = PCStoreValue(); in EmulateSTMIB()
8690 CPSRWriteByInstr(MemA[address+4,4], '1111', TRUE); in EmulateRFE()
8691 BranchWritePC(MemA[address,4]); in EmulateRFE()
10348 MemA[address,4] = R[t]; in EmulateSTREX()
10661 R[t] = MemA[address,4]; in EmulateLDRDImmediate()
10662 R[t2] = MemA[address+4,4]; in EmulateLDRDImmediate()
10809 R[t] = MemA[address,4]; in EmulateLDRDRegister()
10810 R[t2] = MemA[address+4,4]; in EmulateLDRDRegister()
10938 MemA[address,4] = R[t]; in EmulateSTRDImm()
10939 MemA[address+4,4] = R[t2]; in EmulateSTRDImm()
11091 MemA[address,4] = R[t]; in EmulateSTRDReg()
11092 MemA[address+4,4] = R[t2]; in EmulateSTRDReg()
11231 S[d+r] = MemA[address,4]; address = address+4; in EmulateVLDM()
11233 word1 = MemA[address,4]; word2 = MemA[address+4,4]; address = address+8; in EmulateVLDM()
11424 MemA[address,4] = S[d+r]; address = address+4; in EmulateVSTM()
11428 MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; in EmulateVSTM()
11429 MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; in EmulateVSTM()
11628 S[d] = MemA[address,4]; in EmulateVLDR()
11630 word1 = MemA[address,4]; word2 = MemA[address+4,4]; in EmulateVLDR()
11754 MemA[address,4] = S[d]; in EmulateVSTR()
11758 MemA[address,4] = if BigEndian() then D[d]<63:32> else D[d]<31:0>; in EmulateVSTR()
11759 MemA[address+4,4] = if BigEndian() then D[d]<31:0> else D[d]<63:32>; in EmulateVSTR()