IntrinsicsAMDGPU.td - OpenGrok cross reference for /external/llvm-project/llvm/include/llvm/IR/IntrinsicsAMDGPU.td

Lines Matching refs:ArgIndex
180   [IntrConvergent, ImmArg<ArgIndex<0>>]>;
188   [IntrConvergent, ImmArg<ArgIndex<1>>]>;
203   [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
206   [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
215 …Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrWillReturn]>;
224   [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<2>>, IntrWillReturn]
402   [IntrArgMemOnly, IntrWillReturn, NoCapture<ArgIndex<0>>,
403    ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>], "",
417     [IntrArgMemOnly, IntrWillReturn, NoCapture<ArgIndex<0>>,
418      ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]
435   [IntrWillReturn, NoCapture<ArgIndex<0>>,
436    ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
437    ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>
446     NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>],
729           !if(P_.IsAtomic, [], [ImmArg<ArgIndex<AMDGPUImageDimIntrinsicEval<P_>.DmaskArgIndex>>]),
730           !if(P_.IsSample, [ImmArg<ArgIndex<AMDGPUImageDimIntrinsicEval<P_>.UnormArgIndex>>], []),
732           [ImmArg<ArgIndex<AMDGPUImageDimIntrinsicEval<P_>.TexFailCtrlArgIndex>>,
733            ImmArg<ArgIndex<AMDGPUImageDimIntrinsicEval<P_>.CachePolicyArgIndex>>]),
901    ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
911   [IntrNoMem, IntrWillReturn, ImmArg<ArgIndex<2>>]>,
923    ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>], "", [SDNPMemOperand]>,
944   [IntrReadMem, IntrWillReturn, ImmArg<ArgIndex<3>>], "", [SDNPMemOperand]>,
959   [IntrReadMem, IntrWillReturn, ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
974   [IntrWriteMem, IntrWillReturn, ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
990   [IntrWriteMem, IntrWillReturn, ImmArg<ArgIndex<5>>], "", [SDNPMemOperand]>,
1002   [ImmArg<ArgIndex<4>>, IntrWillReturn], "", [SDNPMemOperand]>,
1024   [ImmArg<ArgIndex<5>>, IntrWillReturn], "", [SDNPMemOperand]>,
1038   [ImmArg<ArgIndex<5>>, IntrWillReturn], "", [SDNPMemOperand]>,
1061   [ImmArg<ArgIndex<6>>, IntrWillReturn], "", [SDNPMemOperand]>,
1081      ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>,
1082      ImmArg<ArgIndex<7>>, ImmArg<ArgIndex<8>>], "", [SDNPMemOperand]>,
1097     [IntrWriteMem, IntrWillReturn, ImmArg<ArgIndex<5>>,
1098      ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>,
1099      ImmArg<ArgIndex<8>>, ImmArg<ArgIndex<9>>], "", [SDNPMemOperand]>,
1117      ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
1132      ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>], "", [SDNPMemOperand]>,
1147      ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>], "", [SDNPMemOperand]>,
1163      ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>], "", [SDNPMemOperand]>,
1173   [ImmArg<ArgIndex<4>>, IntrWillReturn], "", [SDNPMemOperand]>,
1193   [ImmArg<ArgIndex<5>>, IntrWillReturn], "", [SDNPMemOperand]>,
1205   [ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
1224   [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<6>>,
1225    ImmArg<ArgIndex<7>>, IntrWriteMem, IntrInaccessibleMemOnly,
1237   [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>,
1238    ImmArg<ArgIndex<5>>, IntrWriteMem, IntrInaccessibleMemOnly,
1260   Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem,
1266   Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem,
1272   Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem,
1280    IntrWillReturn, ImmArg<ArgIndex<0>>]
1290   [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>]
1311               ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
1321              ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
1329              ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1338              ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1346              ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
1370              ImmArg<ArgIndex<1>>]>;
1439              ImmArg<ArgIndex<2>>]>;
1444              ImmArg<ArgIndex<2>>]>;
1607   [IntrNoMem, IntrSpeculatable, NoCapture<ArgIndex<0>>, IntrWillReturn]
1613   [IntrNoMem, IntrSpeculatable, NoCapture<ArgIndex<0>>, IntrWillReturn]
1638              ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>,
1639              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
1650               ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
1651               ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1686              ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1693              ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1702              ImmArg<ArgIndex<1>>]>;
1713   [IntrArgMemOnly, IntrWillReturn, NoCapture<ArgIndex<0>>], "",
1742     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1757     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1772     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1787     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1802     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1818     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1834     [IntrNoMem, IntrSpeculatable, IntrWillReturn, ImmArg<ArgIndex<3>>]
1849              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1856              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1863              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1870              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1877              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1884              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1891              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1898              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1905              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1912              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1919              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1926              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1933              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1940              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1947              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1954              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1961              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1968              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1975              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;
1982              ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>]>;