Lines Matching refs:Pat

19 def : Pat<(atomic_fence (i64 4), (timm)), (DMB (i32 0x9))>;
20 def : Pat<(atomic_fence (timm), (timm)), (DMB (i32 0xb))>;
46 def : Pat<(acquiring_load<atomic_load_8>  GPR64sp:$ptr), (LDARB GPR64sp:$ptr)>;
47 def : Pat<(relaxed_load<atomic_load_8> (ro_Windexed8 GPR64sp:$Rn, GPR32:$Rm,
50 def : Pat<(relaxed_load<atomic_load_8> (ro_Xindexed8 GPR64sp:$Rn, GPR64:$Rm,
53 def : Pat<(relaxed_load<atomic_load_8> (am_indexed8 GPR64sp:$Rn,
56 def : Pat<(relaxed_load<atomic_load_8>
61 def : Pat<(acquiring_load<atomic_load_16> GPR64sp:$ptr), (LDARH GPR64sp:$ptr)>;
62 def : Pat<(relaxed_load<atomic_load_16> (ro_Windexed16 GPR64sp:$Rn, GPR32:$Rm,
65 def : Pat<(relaxed_load<atomic_load_16> (ro_Xindexed16 GPR64sp:$Rn, GPR64:$Rm,
68 def : Pat<(relaxed_load<atomic_load_16> (am_indexed16 GPR64sp:$Rn,
71 def : Pat<(relaxed_load<atomic_load_16>
76 def : Pat<(acquiring_load<atomic_load_32> GPR64sp:$ptr), (LDARW GPR64sp:$ptr)>;
77 def : Pat<(relaxed_load<atomic_load_32> (ro_Windexed32 GPR64sp:$Rn, GPR32:$Rm,
80 def : Pat<(relaxed_load<atomic_load_32> (ro_Xindexed32 GPR64sp:$Rn, GPR64:$Rm,
83 def : Pat<(relaxed_load<atomic_load_32> (am_indexed32 GPR64sp:$Rn,
86 def : Pat<(relaxed_load<atomic_load_32>
91 def : Pat<(acquiring_load<atomic_load_64> GPR64sp:$ptr), (LDARX GPR64sp:$ptr)>;
92 def : Pat<(relaxed_load<atomic_load_64> (ro_Windexed64 GPR64sp:$Rn, GPR32:$Rm,
95 def : Pat<(relaxed_load<atomic_load_64> (ro_Xindexed64 GPR64sp:$Rn, GPR64:$Rm,
98 def : Pat<(relaxed_load<atomic_load_64> (am_indexed64 GPR64sp:$Rn,
101 def : Pat<(relaxed_load<atomic_load_64>
128 def : Pat<(releasing_store<atomic_store_8> GPR64sp:$ptr, GPR32:$val),
130 def : Pat<(relaxed_store<atomic_store_8>
134 def : Pat<(relaxed_store<atomic_store_8>
138 def : Pat<(relaxed_store<atomic_store_8>
141 def : Pat<(relaxed_store<atomic_store_8>
146 def : Pat<(releasing_store<atomic_store_16> GPR64sp:$ptr, GPR32:$val),
148 def : Pat<(relaxed_store<atomic_store_16> (ro_Windexed16 GPR64sp:$Rn, GPR32:$Rm,
152 def : Pat<(relaxed_store<atomic_store_16> (ro_Xindexed16 GPR64sp:$Rn, GPR64:$Rm,
156 def : Pat<(relaxed_store<atomic_store_16>
159 def : Pat<(relaxed_store<atomic_store_16>
164 def : Pat<(releasing_store<atomic_store_32> GPR64sp:$ptr, GPR32:$val),
166 def : Pat<(relaxed_store<atomic_store_32> (ro_Windexed32 GPR64sp:$Rn, GPR32:$Rm,
170 def : Pat<(relaxed_store<atomic_store_32> (ro_Xindexed32 GPR64sp:$Rn, GPR64:$Rm,
174 def : Pat<(relaxed_store<atomic_store_32>
177 def : Pat<(relaxed_store<atomic_store_32>
182 def : Pat<(releasing_store<atomic_store_64> GPR64sp:$ptr, GPR64:$val),
184 def : Pat<(relaxed_store<atomic_store_64> (ro_Windexed64 GPR64sp:$Rn, GPR32:$Rm,
188 def : Pat<(relaxed_store<atomic_store_64> (ro_Xindexed64 GPR64sp:$Rn, GPR64:$Rm,
192 def : Pat<(relaxed_store<atomic_store_64>
195 def : Pat<(relaxed_store<atomic_store_64>
229 def : Pat<(ldxr_1 GPR64sp:$addr),
231 def : Pat<(ldxr_2 GPR64sp:$addr),
233 def : Pat<(ldxr_4 GPR64sp:$addr),
235 def : Pat<(ldxr_8 GPR64sp:$addr), (LDXRX GPR64sp:$addr)>;
237 def : Pat<(and (ldxr_1 GPR64sp:$addr), 0xff),
239 def : Pat<(and (ldxr_2 GPR64sp:$addr), 0xffff),
241 def : Pat<(and (ldxr_4 GPR64sp:$addr), 0xffffffff),
270 def : Pat<(ldaxr_1 GPR64sp:$addr),
272 def : Pat<(ldaxr_2 GPR64sp:$addr),
274 def : Pat<(ldaxr_4 GPR64sp:$addr),
276 def : Pat<(ldaxr_8 GPR64sp:$addr), (LDAXRX GPR64sp:$addr)>;
278 def : Pat<(and (ldaxr_1 GPR64sp:$addr), 0xff),
280 def : Pat<(and (ldaxr_2 GPR64sp:$addr), 0xffff),
282 def : Pat<(and (ldaxr_4 GPR64sp:$addr), 0xffffffff),
316 def : Pat<(stxr_1 GPR64:$val, GPR64sp:$addr),
318 def : Pat<(stxr_2 GPR64:$val, GPR64sp:$addr),
320 def : Pat<(stxr_4 GPR64:$val, GPR64sp:$addr),
322 def : Pat<(stxr_8 GPR64:$val, GPR64sp:$addr),
325 def : Pat<(stxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
327 def : Pat<(stxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
329 def : Pat<(stxr_4 (zext GPR32:$val), GPR64sp:$addr),
332 def : Pat<(stxr_1 (and GPR64:$val, 0xff), GPR64sp:$addr),
334 def : Pat<(stxr_2 (and GPR64:$val, 0xffff), GPR64sp:$addr),
336 def : Pat<(stxr_4 (and GPR64:$val, 0xffffffff), GPR64sp:$addr),
370 def : Pat<(stlxr_1 GPR64:$val, GPR64sp:$addr),
372 def : Pat<(stlxr_2 GPR64:$val, GPR64sp:$addr),
374 def : Pat<(stlxr_4 GPR64:$val, GPR64sp:$addr),
376 def : Pat<(stlxr_8 GPR64:$val, GPR64sp:$addr),
379 def : Pat<(stlxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
381 def : Pat<(stlxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
383 def : Pat<(stlxr_4 (zext GPR32:$val), GPR64sp:$addr),
386 def : Pat<(stlxr_1 (and GPR64:$val, 0xff), GPR64sp:$addr),
388 def : Pat<(stlxr_2 (and GPR64:$val, 0xffff), GPR64sp:$addr),
390 def : Pat<(stlxr_4 (and GPR64:$val, 0xffffffff), GPR64sp:$addr),
396 def : Pat<(int_aarch64_clrex), (CLREX 0xf)>;