168   for (MachineInstr &PredI : make_range(std::next(RIt), PredMBB->rend())) {  in knownRegValInBlock()
171     switch (PredI.getOpcode()) {  in knownRegValInBlock()
184       if (!PredI.getOperand(1).isReg())  in knownRegValInBlock()
186       MCPhysReg DstReg = PredI.getOperand(0).getReg();  in knownRegValInBlock()
187       MCPhysReg SrcReg = PredI.getOperand(1).getReg();  in knownRegValInBlock()
194       if (PredI.getOperand(2).isImm() && DomBBClobberedRegs.available(SrcReg) &&  in knownRegValInBlock()
197         int32_t KnownImm = PredI.getOperand(2).getImm();  in knownRegValInBlock()
198         int32_t Shift = PredI.getOperand(3).getImm();  in knownRegValInBlock()
202         FirstUse = PredI;  in knownRegValInBlock()
217       FirstUse = PredI;  in knownRegValInBlock()
252       MCPhysReg DstReg = PredI.getOperand(0).getReg();  in knownRegValInBlock()
262       FirstUse = PredI;  in knownRegValInBlock()
269     if (PredI.definesRegister(AArch64::NZCV))  in knownRegValInBlock()
273     LiveRegUnits::accumulateUsedDefed(PredI, DomBBClobberedRegs, DomBBUsedRegs,  in knownRegValInBlock()
319     for (auto PredI = Itr;; --PredI) {  in optimizeBlock()  local
320       if (FirstUse == PredI)  in optimizeBlock()
323       if (PredI->isCopy()) {  in optimizeBlock()
324         MCPhysReg CopyDstReg = PredI->getOperand(0).getReg();  in optimizeBlock()
325         MCPhysReg CopySrcReg = PredI->getOperand(1).getReg();  in optimizeBlock()
335               FirstUse = PredI;  in optimizeBlock()
344               FirstUse = PredI;  in optimizeBlock()
351       if (PredI == PredMBB->begin())  in optimizeBlock()
354       LiveRegUnits::accumulateUsedDefed(*PredI, OptBBClobberedRegs,  in optimizeBlock()