Lines Matching refs:ElementWidth
347 int ElementWidth; member
374 unsigned ElementWidth; member
1106 template <int ElementWidth, unsigned Class>
1111 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth()
1117 template <int ElementWidth, unsigned Class>
1122 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth()
1128 template <int ElementWidth, unsigned Class,
1132 auto VectorMatch = isSVEDataVectorRegOfWidth<ElementWidth, Class>(); in isSVEDataVectorRegWithShiftExtend()
1212 unsigned ElementWidth>
1220 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList()
1867 Op->Reg.ElementWidth = 0; in CreateReg()
1878 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg() argument
1888 Op->Reg.ElementWidth = ElementWidth; in CreateVectorReg()
1894 unsigned ElementWidth, RegKind RegisterKind, SMLoc S, SMLoc E, in CreateVectorList() argument
1900 Op->VectorList.ElementWidth = ElementWidth; in CreateVectorList()
3144 unsigned ElementWidth = KindRes->second; in tryParseNeonVectorRegister() local
3146 AArch64Operand::CreateVectorReg(Reg, RegKind::NeonVector, ElementWidth, in tryParseNeonVectorRegister()
3235 unsigned ElementWidth = KindRes->second; in tryParseSVEPredicateVector() local
3237 RegNum, RegKind::SVEPredicateVector, ElementWidth, S, in tryParseSVEPredicateVector()
3472 unsigned ElementWidth = 0; in tryParseVectorList() local
3475 std::tie(NumElements, ElementWidth) = *VK; in tryParseVectorList()
3479 FirstReg, Count, NumElements, ElementWidth, VectorKind, S, getLoc(), in tryParseVectorList()
6128 unsigned ElementWidth = KindRes->second; in tryParseSVEDataVector() local
6133 RegNum, RegKind::SVEDataVector, ElementWidth, S, S, getContext())); in tryParseSVEDataVector()
6152 RegNum, RegKind::SVEDataVector, ElementWidth, S, Ext->getEndLoc(), in tryParseSVEDataVector()