435   const LLT V2S16 = LLT::vector(2, 16);  in AMDGPULegalizerInfo()  local
497     S32, S64, S16, V2S16  in AMDGPULegalizerInfo()
508     .legalFor({S32, S64, V2S16, S16, V4S16, S1, S128, S256})  in AMDGPULegalizerInfo()
523       .legalFor({S32, S16, V2S16})  in AMDGPULegalizerInfo()
530       .legalFor({S32, S16, V2S16}) // Clamp modifier  in AMDGPULegalizerInfo()
609     .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16})  in AMDGPULegalizerInfo()
672       FPOpActions.legalFor({S16, V2S16});  in AMDGPULegalizerInfo()
759       .lowerFor({S64, S16, V2S16})  in AMDGPULegalizerInfo()
786     .legalFor({{V2S16, V2S32}})  in AMDGPULegalizerInfo()
949       .legalFor({S16, S32, V2S16})  in AMDGPULegalizerInfo()
959         .legalFor({S32, S16, V2S16})  in AMDGPULegalizerInfo()
1090                                       {V2S16, GlobalPtr, 32, GlobalAlign32},  in AMDGPULegalizerInfo()
1099                                       {V2S16, LocalPtr, 32, 32},  in AMDGPULegalizerInfo()
1104                                       {V2S16, PrivatePtr, 32, 32},  in AMDGPULegalizerInfo()
1309     .legalForCartesianProduct({S32, S64, S16, V2S32, V2S16, V4S16,  in AMDGPULegalizerInfo()
1329       Shifts.legalFor({{S16, S16}, {V2S16, V2S16}})  in AMDGPULegalizerInfo()
1454     .fewerElementsIf(isWideVec16(0), changeTo(0, V2S16));  in AMDGPULegalizerInfo()
1464       .legalFor({V2S16, S32})  in AMDGPULegalizerInfo()
1468     BuildVector.customFor({V2S16, S16});  in AMDGPULegalizerInfo()
1472       .customFor({V2S16, S32})  in AMDGPULegalizerInfo()
1489       .customFor({V2S16, V2S16})  in AMDGPULegalizerInfo()
1513       .lowerFor({{S16, V2S16}})  in AMDGPULegalizerInfo()
1525                        changeTo(1, V2S16))  in AMDGPULegalizerInfo()
1579     SextInReg.lowerFor({{V2S16}})  in AMDGPULegalizerInfo()
1583       .fewerElementsIf(elementTypeIs(0, S16), changeTo(0, V2S16));  in AMDGPULegalizerInfo()
2146   const LLT V2S16 = LLT::vector(2, 16);  in legalizeShuffleVector()  local
2153   if (SrcTy == V2S16 && DstTy == V2S16 &&  in legalizeShuffleVector()
3961   const LLT V2S16 = LLT::vector(2, 16);  in packImageA16AddressToDwords()  local
3971       AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0);  in packImageA16AddressToDwords()
3985             B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)})  in packImageA16AddressToDwords()
3990                  V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()})  in packImageA16AddressToDwords()
4065   const LLT V2S16 = LLT::vector(2, 16);  in legalizeImageIntrinsic()  local
4296     RegTy = !IsTFE && EltSize == 16 ? V2S16 : S32;  in legalizeImageIntrinsic()
4367   if (Ty == V2S16 && NumDataRegs == 1 && !ST.hasUnpackedD16VMem()) {  in legalizeImageIntrinsic()
4380     if (RegTy != V2S16 && !ST.hasUnpackedD16VMem()) {  in legalizeImageIntrinsic()
4382         Reg = B.buildBitcast(V2S16, Reg).getReg(0);  in legalizeImageIntrinsic()
4405   assert(!ST.hasUnpackedD16VMem() && ResTy == V2S16);  in legalizeImageIntrinsic()