Lines Matching refs:printReg
94 dbgs() << P->printReg(Reg) << " to banks "; in dump()
255 Printable printReg(Register Reg, unsigned SubReg = 0) const { in printReg() function in __anonf8be67910111::GCNRegBankReassign
258 OS << llvm::printReg(Reg, TRI); in printReg()
262 OS << "<unassigned> " << llvm::printReg(Reg, TRI); in printReg()
264 OS << llvm::printReg(Reg, TRI) << '(' in printReg()
265 << llvm::printReg(VRM->getPhys(Reg), TRI) << ')'; in printReg()
580 dbgs() << "Potential reassignments of " << printReg(Reg, SubReg) in getFreeBanks()
611 LLVM_DEBUG(dbgs() << "Conflicting operands: " << printReg(Reg1, SubReg1) << in collectCandidates()
612 " and " << printReg(Reg2, SubReg2) << '\n'); in collectCandidates()
674 LLVM_DEBUG(dbgs() << "Trying register " << printReg(Reg) << '\n'); in scavengeReg()
688 LLVM_DEBUG(dbgs() << "Try reassign " << printReg(C.Reg) << " in "; C.MI->dump(); in tryReassign()
735 LLVM_DEBUG(dbgs() << "Found free register " << printReg(Reg) in tryReassign()