Lines Matching refs:OpNode
265 multiclass ALU<BPFArithOp Opc, string OpcodeStr, SDNode OpNode> {
270 [(set GPR:$dst, (OpNode i64:$src2, i64:$src))]>;
275 [(set GPR:$dst, (OpNode GPR:$src2, i64immSExt32:$imm))]>;
280 [(set GPR32:$dst, (OpNode i32:$src2, i32:$src))]>;
285 [(set GPR32:$dst, (OpNode GPR32:$src2, i32immSExt32:$imm))]>;
411 class STOREi64<BPFWidthModifer Opc, string OpcodeStr, PatFrag OpNode>
412 : STORE<Opc, OpcodeStr, [(OpNode i64:$src, ADDRri:$addr)]>;
437 class LOADi64<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
438 : LOAD<SizeOp, OpcodeStr, [(set i64:$dst, (OpNode ADDRri:$addr))]>;
621 class XADD<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
626 [(set GPR:$dst, (OpNode ADDRri:$addr, GPR:$val))]> {
692 string OpcStr, PatFrag OpNode>
697 [(set GPR:$dst, (OpNode ADDRri:$addr, GPR:$val))]> {
710 string OpcStr, PatFrag OpNode>
715 [(set GPR32:$dst, (OpNode ADDRri:$addr, GPR32:$val))]> {
749 class XCHG<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
754 [(set GPR:$dst, (OpNode ADDRri:$addr,GPR:$val))]> {
766 class XCHG32<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
771 [(set GPR32:$dst, (OpNode ADDRri:$addr,GPR32:$val))]> {
792 class CMPXCHG<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
797 [(set R0, (OpNode ADDRri:$addr, R0, GPR:$new))]> {
809 class CMPXCHG32<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
814 [(set W0, (OpNode ADDRri:$addr, W0, GPR32:$new))]> {
865 class LOAD_ABS<BPFWidthModifer SizeOp, string OpcodeStr, Intrinsic OpNode>
870 [(set R0, (OpNode GPR:$skb, i64immSExt32:$imm))]> {
877 class LOAD_IND<BPFWidthModifer SizeOp, string OpcodeStr, Intrinsic OpNode>
882 [(set R0, (OpNode GPR:$skb, GPR:$val))]> {
932 class STOREi32<BPFWidthModifer Opc, string OpcodeStr, PatFrag OpNode>
933 : STORE32<Opc, OpcodeStr, [(OpNode i32:$src, ADDRri:$addr)]>;
956 class LOADi32<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
957 : LOAD32<SizeOp, OpcodeStr, [(set i32:$dst, (OpNode ADDRri:$addr))]>;