Lines Matching refs:ExitingBlock
410 MachineBasicBlock *ExitingBlock = L->findLoopControlBlock(); in findInductionRegister() local
411 if (!Header || !Preheader || !Latch || !ExitingBlock) in findInductionRegister()
458 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in findInductionRegister()
591 MachineBasicBlock *ExitingBlock = L->findLoopControlBlock(); in getLoopTripCount() local
592 if (!ExitingBlock) in getLoopTripCount()
619 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in getLoopTripCount()
628 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in getLoopTripCount()
1221 MachineBasicBlock *ExitingBlock = L->findLoopControlBlock(); in convertToHardwareLoop() local
1223 if (ExitingBlock != L->getLoopLatch()) { in convertToHardwareLoop()
1227 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false)) in convertToHardwareLoop()
1610 MachineBasicBlock *ExitingBlock = L->findLoopControlBlock(); in fixupInductionVariable() local
1612 if (!(Header && Latch && ExitingBlock)) in fixupInductionVariable()
1661 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in fixupInductionVariable()
1665 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in fixupInductionVariable()
1858 MachineBasicBlock *ExitingBlock = L->findLoopControlBlock(); in createPreheaderForLoop() local
1867 if (!Latch || !ExitingBlock || Header->hasAddressTaken()) in createPreheaderForLoop()
1880 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false)) in createPreheaderForLoop()