Lines Matching refs:Sched
202 def ANDN : ALU_rr<0b0100000, 0b111, "andn">, Sched<[]>;
203 def ORN : ALU_rr<0b0100000, 0b110, "orn">, Sched<[]>;
204 def XNOR : ALU_rr<0b0100000, 0b100, "xnor">, Sched<[]>;
208 def SLO : ALU_rr<0b0010000, 0b001, "slo">, Sched<[]>;
209 def SRO : ALU_rr<0b0010000, 0b101, "sro">, Sched<[]>;
213 def ROL : ALU_rr<0b0110000, 0b001, "rol">, Sched<[]>;
214 def ROR : ALU_rr<0b0110000, 0b101, "ror">, Sched<[]>;
218 def SBCLR : ALU_rr<0b0100100, 0b001, "sbclr">, Sched<[]>;
219 def SBSET : ALU_rr<0b0010100, 0b001, "sbset">, Sched<[]>;
220 def SBINV : ALU_rr<0b0110100, 0b001, "sbinv">, Sched<[]>;
221 def SBEXT : ALU_rr<0b0100100, 0b101, "sbext">, Sched<[]>;
225 def GORC : ALU_rr<0b0010100, 0b101, "gorc">, Sched<[]>;
226 def GREV : ALU_rr<0b0110100, 0b101, "grev">, Sched<[]>;
230 def SLOI : RVBShift_ri<0b00100, 0b001, OPC_OP_IMM, "sloi">, Sched<[]>;
231 def SROI : RVBShift_ri<0b00100, 0b101, OPC_OP_IMM, "sroi">, Sched<[]>;
235 def RORI : RVBShift_ri<0b01100, 0b101, OPC_OP_IMM, "rori">, Sched<[]>;
238 def SBCLRI : RVBShift_ri<0b01001, 0b001, OPC_OP_IMM, "sbclri">, Sched<[]>;
239 def SBSETI : RVBShift_ri<0b00101, 0b001, OPC_OP_IMM, "sbseti">, Sched<[]>;
240 def SBINVI : RVBShift_ri<0b01101, 0b001, OPC_OP_IMM, "sbinvi">, Sched<[]>;
241 def SBEXTI : RVBShift_ri<0b01001, 0b101, OPC_OP_IMM, "sbexti">, Sched<[]>;
245 def GREVI : RVBShift_ri<0b01101, 0b101, OPC_OP_IMM, "grevi">, Sched<[]>;
246 def GORCI : RVBShift_ri<0b00101, 0b101, OPC_OP_IMM, "gorci">, Sched<[]>;
251 Sched<[]>;
253 Sched<[]>;
255 Sched<[]>;
257 Sched<[]>;
259 "$rd, $rs1, $rs3, $shamt">, Sched<[]>;
264 Sched<[]>;
266 Sched<[]>;
268 Sched<[]>;
273 "bmatflip">, Sched<[]>;
277 "sext.b">, Sched<[]>;
279 "sext.h">, Sched<[]>;
284 "crc32.b">, Sched<[]>;
286 "crc32.h">, Sched<[]>;
288 "crc32.w">, Sched<[]>;
293 "crc32.d">, Sched<[]>;
297 "crc32c.b">, Sched<[]>;
299 "crc32c.h">, Sched<[]>;
301 "crc32c.w">, Sched<[]>;
306 "crc32c.d">, Sched<[]>;
309 def CLMUL : ALU_rr<0b0000101, 0b001, "clmul">, Sched<[]>;
310 def CLMULR : ALU_rr<0b0000101, 0b010, "clmulr">, Sched<[]>;
311 def CLMULH : ALU_rr<0b0000101, 0b011, "clmulh">, Sched<[]>;
315 def MIN : ALU_rr<0b0000101, 0b100, "min">, Sched<[]>;
316 def MAX : ALU_rr<0b0000101, 0b101, "max">, Sched<[]>;
317 def MINU : ALU_rr<0b0000101, 0b110, "minu">, Sched<[]>;
318 def MAXU : ALU_rr<0b0000101, 0b111, "maxu">, Sched<[]>;
322 def SHFL : ALU_rr<0b0000100, 0b001, "shfl">, Sched<[]>;
323 def UNSHFL : ALU_rr<0b0000100, 0b101, "unshfl">, Sched<[]>;
327 def BDEP : ALU_rr<0b0100100, 0b110, "bdep">, Sched<[]>;
328 def BEXT : ALU_rr<0b0000100, 0b110, "bext">, Sched<[]>;
332 def PACK : ALU_rr<0b0000100, 0b100, "pack">, Sched<[]>;
333 def PACKU : ALU_rr<0b0100100, 0b100, "packu">, Sched<[]>;
337 def BMATOR : ALU_rr<0b0000100, 0b011, "bmator">, Sched<[]>;
338 def BMATXOR : ALU_rr<0b0100100, 0b011, "bmatxor">, Sched<[]>;
342 def PACKH : ALU_rr<0b0000100, 0b111, "packh">, Sched<[]>;
345 def BFP : ALU_rr<0b0100100, 0b111, "bfp">, Sched<[]>;
348 def SHFLI : RVBShfl_ri<0b000010, 0b001, OPC_OP_IMM, "shfli">, Sched<[]>;
349 def UNSHFLI : RVBShfl_ri<0b000010, 0b101, OPC_OP_IMM, "unshfli">, Sched<[]>;
353 def ADDIWU : RVBALUW_ri<0b100, "addiwu">, Sched<[]>;
354 def SLLIUW : RVBShift_ri<0b00001, 0b001, OPC_OP_IMM_32, "slliu.w">, Sched<[]>;
355 def ADDWU : ALUW_rr<0b0000101, 0b000, "addwu">, Sched<[]>;
356 def SUBWU : ALUW_rr<0b0100101, 0b000, "subwu">, Sched<[]>;
357 def ADDUW : ALUW_rr<0b0000100, 0b000, "addu.w">, Sched<[]>;
358 def SUBUW : ALUW_rr<0b0100100, 0b000, "subu.w">, Sched<[]>;
362 def SLOW : ALUW_rr<0b0010000, 0b001, "slow">, Sched<[]>;
363 def SROW : ALUW_rr<0b0010000, 0b101, "srow">, Sched<[]>;
367 def ROLW : ALUW_rr<0b0110000, 0b001, "rolw">, Sched<[]>;
368 def RORW : ALUW_rr<0b0110000, 0b101, "rorw">, Sched<[]>;
372 def SBCLRW : ALUW_rr<0b0100100, 0b001, "sbclrw">, Sched<[]>;
373 def SBSETW : ALUW_rr<0b0010100, 0b001, "sbsetw">, Sched<[]>;
374 def SBINVW : ALUW_rr<0b0110100, 0b001, "sbinvw">, Sched<[]>;
375 def SBEXTW : ALUW_rr<0b0100100, 0b101, "sbextw">, Sched<[]>;
379 def GORCW : ALUW_rr<0b0010100, 0b101, "gorcw">, Sched<[]>;
380 def GREVW : ALUW_rr<0b0110100, 0b101, "grevw">, Sched<[]>;
384 def SLOIW : RVBShiftW_ri<0b0010000, 0b001, OPC_OP_IMM_32, "sloiw">, Sched<[]>;
385 def SROIW : RVBShiftW_ri<0b0010000, 0b101, OPC_OP_IMM_32, "sroiw">, Sched<[]>;
389 def RORIW : RVBShiftW_ri<0b0110000, 0b101, OPC_OP_IMM_32, "roriw">, Sched<[]>;
393 Sched<[]>;
395 Sched<[]>;
397 Sched<[]>;
401 def GORCIW : RVBShiftW_ri<0b0010100, 0b101, OPC_OP_IMM_32, "gorciw">, Sched<[]>;
402 def GREVIW : RVBShiftW_ri<0b0110100, 0b101, OPC_OP_IMM_32, "greviw">, Sched<[]>;
407 "fslw", "$rd, $rs1, $rs3, $rs2">, Sched<[]>;
409 "$rd, $rs1, $rs3, $rs2">, Sched<[]>;
411 "fsriw", "$rd, $rs1, $rs3, $shamt">, Sched<[]>;
416 "clzw">, Sched<[]>;
418 "ctzw">, Sched<[]>;
420 "pcntw">, Sched<[]>;
424 def CLMULW : ALUW_rr<0b0000101, 0b001, "clmulw">, Sched<[]>;
425 def CLMULRW : ALUW_rr<0b0000101, 0b010, "clmulrw">, Sched<[]>;
426 def CLMULHW : ALUW_rr<0b0000101, 0b011, "clmulhw">, Sched<[]>;
430 def SHFLW : ALUW_rr<0b0000100, 0b001, "shflw">, Sched<[]>;
431 def UNSHFLW : ALUW_rr<0b0000100, 0b101, "unshflw">, Sched<[]>;
435 def BDEPW : ALUW_rr<0b0100100, 0b110, "bdepw">, Sched<[]>;
436 def BEXTW : ALUW_rr<0b0000100, 0b110, "bextw">, Sched<[]>;
440 def PACKW : ALUW_rr<0b0000100, 0b100, "packw">, Sched<[]>;
441 def PACKUW : ALUW_rr<0b0100100, 0b100, "packuw">, Sched<[]>;
445 def BFPW : ALUW_rr<0b0100100, 0b111, "bfpw">, Sched<[]>;
471 def C_NOT : RVBInstC<0b00, "c.not">, Sched<[]>;
472 def C_NEG : RVBInstC<0b01, "c.neg">, Sched<[]>;
476 def C_ZEXTW : RVBInstC<0b10, "c.zext.w">, Sched<[]>;
495 Sched<[]>;
497 Sched<[]>;
499 Sched<[]>;
501 Sched<[]>;
503 Sched<[]>;
505 Sched<[]>;
507 Sched<[]>;
509 Sched<[]>;
511 Sched<[]>;
513 Sched<[]>;
516 Sched<[]>;
518 Sched<[]>;
520 Sched<[]>;
522 Sched<[]>;
524 Sched<[]>;
526 Sched<[]>;
528 Sched<[]>;
530 Sched<[]>;
532 Sched<[]>;
534 Sched<[]>;
536 Sched<[]>;
538 Sched<[]>;
541 Sched<[]>;
543 Sched<[]>;
545 Sched<[]>;
547 Sched<[]>;
549 Sched<[]>;
551 Sched<[]>;
553 Sched<[]>;
555 Sched<[]>;
557 Sched<[]>;
559 Sched<[]>;
563 def : InstAlias<"rev16 $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b10000)>, Sched<[]>;
564 def : InstAlias<"rev8 $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b11000)>, Sched<[]>;
565 def : InstAlias<"rev4 $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b11100)>, Sched<[]>;
566 def : InstAlias<"rev2 $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b11110)>, Sched<[]>;
567 def : InstAlias<"rev $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b11111)>, Sched<[]>;
570 Sched<[]>;
572 Sched<[]>;
574 Sched<[]>;
576 Sched<[]>;
578 Sched<[]>;
580 Sched<[]>;
582 Sched<[]>;
584 Sched<[]>;
586 def : InstAlias<"orc16 $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b10000)>, Sched<[]>;
587 def : InstAlias<"orc8 $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b11000)>, Sched<[]>;
588 def : InstAlias<"orc4 $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b11100)>, Sched<[]>;
589 def : InstAlias<"orc2 $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b11110)>, Sched<[]>;
590 def : InstAlias<"orc $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b11111)>, Sched<[]>;
595 Sched<[]>;
597 Sched<[]>;
599 Sched<[]>;
601 Sched<[]>;
603 Sched<[]>;
605 Sched<[]>;
607 Sched<[]>;
609 Sched<[]>;
611 Sched<[]>;
613 Sched<[]>;
615 Sched<[]>;
618 Sched<[]>;
620 Sched<[]>;
622 Sched<[]>;
624 Sched<[]>;
626 Sched<[]>;
628 Sched<[]>;
630 Sched<[]>;
632 Sched<[]>;
634 Sched<[]>;
636 Sched<[]>;
638 Sched<[]>;
640 Sched<[]>;
642 Sched<[]>;
644 Sched<[]>;
646 Sched<[]>;
648 Sched<[]>;
650 Sched<[]>;
652 Sched<[]>;
655 Sched<[]>;
657 Sched<[]>;
659 Sched<[]>;
661 Sched<[]>;
663 Sched<[]>;
665 Sched<[]>;
667 Sched<[]>;
669 Sched<[]>;
671 Sched<[]>;
673 Sched<[]>;
675 Sched<[]>;