9513         case ISD::SUB: HOpcode = X86ISD::HSUB; break;  in isHopBuildVector()
9665       X86Opcode = X86ISD::HSUB;  in LowerToHorizontalOp()
9695       X86Opcode = X86ISD::HSUB;  in LowerToHorizontalOp()
10865   case X86ISD::HSUB:  in IsElementEquivalent()
21486     case ISD::SUB: HOpcode = X86ISD::HSUB; break;  in lowerAddSubToHorizontalOp()
30797   NODE_NAME_CASE(HSUB)  in getTargetNodeName()
35887                   Opcode0 == X86ISD::FHSUB || Opcode0 == X86ISD::HSUB);  in canonicalizeShuffleMaskWithHorizOp()
37472       HOp.getOpcode() != X86ISD::HSUB && HOp.getOpcode() != X86ISD::FHSUB)  in foldShuffleOfHorizOp()
37889   case X86ISD::HSUB:  in SimplifyDemandedVectorEltsForTargetNode()
38078     case X86ISD::HSUB:  in SimplifyDemandedVectorEltsForTargetNode()
42606           X86ISD::HSUB == Opcode || X86ISD::FHSUB == Opcode ||  in combineHorizOpWithShuffle()
42847           X86ISD::HSUB == N->getOpcode() || X86ISD::FHSUB == N->getOpcode()) &&  in combineVectorHADDSUB()
48455       return DAG.getNode(IsAdd ? X86ISD::HADD : X86ISD::HSUB, DL,  in combineAddOrSubToHADDorHSUB()
48900     case X86ISD::HSUB:  in combineConcatVectorOps()
49811   case X86ISD::HSUB:  in PerformDAGCombine()