Lines Matching refs:prd
1350 RegisterClass SrcRC, SubRegIndex Subreg, Predicate prd> {
1351 let Predicates = [prd] in
1354 let Predicates = [prd, HasVLX] in {
1364 RegisterClass SrcRC, Predicate prd> {
1365 let Predicates = [prd] in
1368 let Predicates = [prd, HasVLX] in {
1387 AVX512VLVectorVTInfo _, Predicate prd,
1389 let Predicates = [prd] in {
1395 let Predicates = [prd, HasVLX] in {
2182 AVX512VLVectorVTInfo VTInfo, Predicate prd,
2184 let Predicates = [prd] in
2188 let Predicates = [prd, HasVLX] in {
2199 Predicate prd, bit IsCommutable = 0> {
2200 let Predicates = [prd] in
2204 let Predicates = [prd, HasVLX] in {
2363 AVX512VLVectorVTInfo VTInfo, Predicate prd> {
2364 let Predicates = [prd] in
2368 let Predicates = [prd, HasVLX] in {
2379 AVX512VLVectorVTInfo VTInfo, Predicate prd> {
2380 let Predicates = [prd] in
2384 let Predicates = [prd, HasVLX] in {
2676 Predicate prd> {
2677 let Predicates = [prd], ExeDomain = _.ExeDomain, Uses = [MXCSR] in {
2792 Predicate prd>{
2793 let Predicates = [prd] in {
2797 let Predicates = [prd, HasVLX] in {
2807 Predicate prd> {
2809 sched, prd>,
2812 sched, prd>,
2815 sched.Scl, f32x_info, prd>, VEX_LIG,
2818 sched.Scl, f64x_info, prd>, VEX_LIG,
2978 X86FoldableSchedWrite sched, Predicate prd> {
2979 let Predicates = [prd] in
3018 X86FoldableSchedWrite sched, Predicate prd,
3020 let Predicates = [prd], isCommutable = IsCommutable in
3088 Predicate prd> {
3089 let Predicates = [prd] in {
3108 Predicate prd> {
3109 let Predicates = [prd], Defs = [EFLAGS] in
3466 AVX512VLVectorVTInfo _, Predicate prd,
3469 let Predicates = [prd] in
3474 let Predicates = [prd, HasVLX] in {
3485 AVX512VLVectorVTInfo _, Predicate prd,
3489 let Predicates = [prd] in
3494 let Predicates = [prd, HasVLX] in {
3560 AVX512VLVectorVTInfo _, Predicate prd,
3563 let Predicates = [prd] in
3567 let Predicates = [prd, HasVLX] in {
3578 AVX512VLVectorVTInfo _, Predicate prd,
3581 let Predicates = [prd] in
3586 let Predicates = [prd, HasVLX] in {
4675 X86SchedWriteWidths sched, Predicate prd,
4677 let Predicates = [prd] in
4681 let Predicates = [prd, HasVLX] in {
4691 X86SchedWriteWidths sched, Predicate prd,
4693 let Predicates = [prd] in
4697 let Predicates = [prd, HasVLX] in {
4706 X86SchedWriteWidths sched, Predicate prd,
4709 sched, prd, IsCommutable>,
4714 X86SchedWriteWidths sched, Predicate prd,
4717 sched, prd, IsCommutable>, EVEX_CD8<32, CD8VF>;
4721 X86SchedWriteWidths sched, Predicate prd,
4724 sched, prd, IsCommutable>, EVEX_CD8<16, CD8VF>,
4729 X86SchedWriteWidths sched, Predicate prd,
4732 sched, prd, IsCommutable>, EVEX_CD8<8, CD8VF>,
4738 Predicate prd, bit IsCommutable = 0> {
4739 defm Q : avx512_binop_rm_vl_q<opc_q, OpcodeStr#"q", OpNode, sched, prd,
4742 defm D : avx512_binop_rm_vl_d<opc_d, OpcodeStr#"d", OpNode, sched, prd,
4748 Predicate prd, bit IsCommutable = 0> {
4749 defm W : avx512_binop_rm_vl_w<opc_w, OpcodeStr#"w", OpNode, sched, prd,
4752 defm B : avx512_binop_rm_vl_b<opc_b, OpcodeStr#"b", OpNode, sched, prd,
4835 SDNode OpNode, Predicate prd, bit IsCommutable = 0> {
4836 let Predicates = [prd] in
4841 let Predicates = [HasVLX, prd] in {
5560 Predicate prd, X86SchedWriteSizes sched,
5563 let Predicates = [prd] in {
5573 let Predicates = [prd, HasVLX] in {
5863 Predicate prd> {
5864 let Predicates = [prd] in
5868 let Predicates = [prd, HasVLX] in {
6234 Predicate prd, SDNode OpNode,
6236 let Predicates = [prd] in
6239 let Predicates = [HasVLX, prd] in {
9250 PatFrag mtruncFrag, Predicate prd = HasAVX512>{
9252 let Predicates = [HasVLX, prd] in {
9263 let Predicates = [prd] in
9915 string OpcodeStr, Predicate prd> {
9916 let Predicates = [prd] in
9919 let Predicates = [prd, HasVLX] in {
9951 AVX512VLVectorVTInfo VTInfo, Predicate prd> {
9952 let Predicates = [prd] in
9956 let Predicates = [prd, HasVLX] in {
9962 let Predicates = [prd, NoVLX] in {
10173 Predicate prd>{
10174 let Predicates = [prd] in {
10180 let Predicates = [prd, HasVLX] in {
10315 SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd>{
10316 let Predicates = [prd] in {
10322 let Predicates = [prd, HasVLX] in {
10362 SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd> {
10363 let Predicates = [prd] in {
10372 X86SchedWriteWidths sched, Predicate prd>{
10374 opcPs, OpNode, MaskOpNode, OpNodeSAE, sched, prd>,
10377 opcPd, OpNode, MaskOpNode, OpNodeSAE, sched, prd>,
10721 AVX512VLVectorVTInfo VTInfo, Predicate prd> {
10722 let Predicates = [prd] in
10726 let Predicates = [prd, HasVLX] in {
10736 Predicate prd> {
10737 let Predicates = [prd] in
10741 let Predicates = [prd, HasVLX] in {
10751 Predicate prd> {
10753 avx512vl_i64_info, prd>, VEX_W;
10755 avx512vl_i32_info, prd>;
10760 Predicate prd> {
10762 avx512vl_i16_info, prd>, VEX_WIG;
10764 avx512vl_i8_info, prd>, VEX_WIG;
10796 AVX512VLVectorVTInfo _, Predicate prd> {
10797 let Predicates = [prd, NoVLX] in {
11092 X86SchedWriteWidths sched, Predicate prd>{
11093 let Predicates = [prd] in
11096 let Predicates = [prd, HasVLX] in {
11133 Predicate prd> {
11134 let Predicates = [prd] in
11137 let Predicates = [prd, HasVLX] in {
12164 SDNode OpNode, Predicate prd,
12166 let Predicates = [prd] in
12171 let Predicates = [HasVLX, prd] in {
12290 AVX512VLVectorVTInfo src_v, Predicate prd> {
12291 let Predicates = [prd] in {
12295 let Predicates = [HasVLX, prd] in {