Lines Matching refs:Pat

10 // as well as Pat patterns used during instruction selection.
48 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
66 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
284 def : Pat<(i8 0), (EXTRACT_SUBREG (MOV32r0), sub_8bit)>;
285 def : Pat<(i16 0), (EXTRACT_SUBREG (MOV32r0), sub_16bit)>;
286 def : Pat<(i64 0), (SUBREG_TO_REG (i64 0), (MOV32r0), sub_32bit)>;
303   def : Pat<(i16 1), (EXTRACT_SUBREG (MOV32r1), sub_16bit)>;
304   def : Pat<(i16 -1), (EXTRACT_SUBREG (MOV32r_1), sub_16bit)>;
329 def : Pat<(i64 mov64imm32:$src), (MOV32ri64 mov64imm32:$src)>;
334 // FIXME: These are pseudo ops that should be replaced with Pat<> patterns.
335 // However, Pat<> can't replicate the destination reg into the inputs of the
575 def : Pat<(f128 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
579   def : Pat<(v16i8 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
581   def : Pat<(v8i16 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
583   def : Pat<(v4i32 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
585   def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
587   def : Pat<(v2f64 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
590   def : Pat<(v32i8 (X86cmov VR256:$t, VR256:$f, timm:$cond, EFLAGS)),
592   def : Pat<(v16i16 (X86cmov VR256:$t, VR256:$f, timm:$cond, EFLAGS)),
594   def : Pat<(v8i32 (X86cmov VR256:$t, VR256:$f, timm:$cond, EFLAGS)),
596   def : Pat<(v8f32 (X86cmov VR256:$t, VR256:$f, timm:$cond, EFLAGS)),
598   def : Pat<(v4f64 (X86cmov VR256:$t, VR256:$f, timm:$cond, EFLAGS)),
602   def : Pat<(v16i8 (X86cmov VR128X:$t, VR128X:$f, timm:$cond, EFLAGS)),
604   def : Pat<(v8i16 (X86cmov VR128X:$t, VR128X:$f, timm:$cond, EFLAGS)),
606   def : Pat<(v4i32 (X86cmov VR128X:$t, VR128X:$f, timm:$cond, EFLAGS)),
608   def : Pat<(v4f32 (X86cmov VR128X:$t, VR128X:$f, timm:$cond, EFLAGS)),
610   def : Pat<(v2f64 (X86cmov VR128X:$t, VR128X:$f, timm:$cond, EFLAGS)),
613   def : Pat<(v32i8 (X86cmov VR256X:$t, VR256X:$f, timm:$cond, EFLAGS)),
615   def : Pat<(v16i16 (X86cmov VR256X:$t, VR256X:$f, timm:$cond, EFLAGS)),
617   def : Pat<(v8i32 (X86cmov VR256X:$t, VR256X:$f, timm:$cond, EFLAGS)),
619   def : Pat<(v8f32 (X86cmov VR256X:$t, VR256X:$f, timm:$cond, EFLAGS)),
621   def : Pat<(v4f64 (X86cmov VR256X:$t, VR256X:$f, timm:$cond, EFLAGS)),
625 def : Pat<(v64i8 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
627 def : Pat<(v32i16 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
629 def : Pat<(v16i32 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
631 def : Pat<(v16f32 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
633 def : Pat<(v8f64 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
809   def : Pat<(X86lock_add addr:$dst, (i8  -1)), (LOCK_DEC8m  addr:$dst)>;
810   def : Pat<(X86lock_add addr:$dst, (i16 -1)), (LOCK_DEC16m addr:$dst)>;
811   def : Pat<(X86lock_add addr:$dst, (i32 -1)), (LOCK_DEC32m addr:$dst)>;
812   def : Pat<(X86lock_add addr:$dst, (i64 -1)), (LOCK_DEC64m addr:$dst)>;
813   def : Pat<(X86lock_sub addr:$dst, (i8  -1)), (LOCK_INC8m  addr:$dst)>;
814   def : Pat<(X86lock_sub addr:$dst, (i16 -1)), (LOCK_INC16m addr:$dst)>;
815   def : Pat<(X86lock_sub addr:$dst, (i32 -1)), (LOCK_INC32m addr:$dst)>;
816   def : Pat<(X86lock_sub addr:$dst, (i64 -1)), (LOCK_INC64m addr:$dst)>;
970   def : Pat<(atomic_store_8 addr:$dst,
973   def : Pat<(atomic_store_16 addr:$dst,
976   def : Pat<(atomic_store_32 addr:$dst,
979   def : Pat<(atomic_store_64 addr:$dst,
983   def : Pat<(atomic_store_8 addr:$dst,
986   def : Pat<(atomic_store_16 addr:$dst,
989   def : Pat<(atomic_store_32 addr:$dst,
992   def : Pat<(atomic_store_64 addr:$dst,
1005   def : Pat<(op FR32:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1008   def : Pat<(op FR32:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1011   def : Pat<(op FR32X:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1015   def : Pat<(op FR64:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1018   def : Pat<(op FR64:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1021   def : Pat<(op FR64X:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1030   def : Pat<(atomic_store_8 addr:$dst, dag8),
1032   def : Pat<(atomic_store_16 addr:$dst, dag16),
1034   def : Pat<(atomic_store_32 addr:$dst, dag32),
1036   def : Pat<(atomic_store_64 addr:$dst, dag64),
1064 def : Pat<(atomic_store_8 addr:$dst, (i8 imm:$src)),
1066 def : Pat<(atomic_store_16 addr:$dst, (i16 imm:$src)),
1068 def : Pat<(atomic_store_32 addr:$dst, (i32 imm:$src)),
1070 def : Pat<(atomic_store_64 addr:$dst, (i64immSExt32:$src)),
1073 def : Pat<(atomic_store_8 addr:$dst, GR8:$src),
1075 def : Pat<(atomic_store_16 addr:$dst, GR16:$src),
1077 def : Pat<(atomic_store_32 addr:$dst, GR32:$src),
1079 def : Pat<(atomic_store_64 addr:$dst, GR64:$src),
1082 def : Pat<(i8  (atomic_load_8 addr:$src)),  (MOV8rm addr:$src)>;
1083 def : Pat<(i16 (atomic_load_16 addr:$src)), (MOV16rm addr:$src)>;
1084 def : Pat<(i32 (atomic_load_32 addr:$src)), (MOV32rm addr:$src)>;
1085 def : Pat<(i64 (atomic_load_64 addr:$src)), (MOV64rm addr:$src)>;
1088 def : Pat<(atomic_store_32 addr:$dst, (i32 (bitconvert (f32 FR32:$src)))),
1090 def : Pat<(atomic_store_32 addr:$dst, (i32 (bitconvert (f32 FR32:$src)))),
1092 def : Pat<(atomic_store_32 addr:$dst, (i32 (bitconvert (f32 FR32:$src)))),
1095 def : Pat<(atomic_store_64 addr:$dst, (i64 (bitconvert (f64 FR64:$src)))),
1097 def : Pat<(atomic_store_64 addr:$dst, (i64 (bitconvert (f64 FR64:$src)))),
1099 def : Pat<(atomic_store_64 addr:$dst, (i64 (bitconvert (f64 FR64:$src)))),
1102 def : Pat<(f32 (bitconvert (i32 (atomic_load_32 addr:$src)))),
1104 def : Pat<(f32 (bitconvert (i32 (atomic_load_32 addr:$src)))),
1106 def : Pat<(f32 (bitconvert (i32 (atomic_load_32 addr:$src)))),
1109 def : Pat<(f64 (bitconvert (i64 (atomic_load_64 addr:$src)))),
1111 def : Pat<(f64 (bitconvert (i64 (atomic_load_64 addr:$src)))),
1113 def : Pat<(f64 (bitconvert (i64 (atomic_load_64 addr:$src)))),
1124 def : Pat<(simple_store (i16 0), addr:$dst), (AND16mi8 addr:$dst, 0)>;
1125 def : Pat<(simple_store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
1126 def : Pat<(simple_store (i64 0), addr:$dst), (AND64mi8 addr:$dst, 0)>;
1127 def : Pat<(simple_store (i16 -1), addr:$dst), (OR16mi8 addr:$dst, -1)>;
1128 def : Pat<(simple_store (i32 -1), addr:$dst), (OR32mi8 addr:$dst, -1)>;
1129 def : Pat<(simple_store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
1135 def : Pat<(i64 (X86Wrapper tconstpool  :$dst)),
1137 def : Pat<(i64 (X86Wrapper tjumptable  :$dst)),
1139 def : Pat<(i64 (X86Wrapper tglobaladdr :$dst)),
1141 def : Pat<(i64 (X86Wrapper texternalsym:$dst)),
1143 def : Pat<(i64 (X86Wrapper mcsym:$dst)),
1145 def : Pat<(i64 (X86Wrapper tblockaddress:$dst)),
1151 def : Pat<(store (i64 (X86Wrapper tconstpool:$src)), addr:$dst),
1154 def : Pat<(store (i64 (X86Wrapper tjumptable:$src)), addr:$dst),
1157 def : Pat<(store (i64 (X86Wrapper tglobaladdr:$src)), addr:$dst),
1160 def : Pat<(store (i64 (X86Wrapper texternalsym:$src)), addr:$dst),
1163 def : Pat<(store (i64 (X86Wrapper mcsym:$src)), addr:$dst),
1166 def : Pat<(store (i64 (X86Wrapper tblockaddress:$src)), addr:$dst),
1170 def : Pat<(i32 (X86RecoverFrameAlloc mcsym:$dst)), (MOV32ri mcsym:$dst)>;
1171 def : Pat<(i64 (X86RecoverFrameAlloc mcsym:$dst)), (MOV64ri mcsym:$dst)>;
1177 def : Pat<(i64 (X86Wrapper tglobaltlsaddr :$dst)),
1180 def : Pat<(add GR64:$src1, (X86Wrapper tglobaltlsaddr :$dst)),
1186 def : Pat<(X86call (i64 tglobaladdr:$dst)),
1188 def : Pat<(X86call (i64 texternalsym:$dst)),
1209 def : Pat<(X86tcret ptr_rc_tailcall:$dst, timm:$off),
1216 def : Pat<(X86tcret (load addr:$dst), timm:$off),
1220 def : Pat<(X86tcret (i32 tglobaladdr:$dst), timm:$off),
1224 def : Pat<(X86tcret (i32 texternalsym:$dst), timm:$off),
1228 def : Pat<(X86tcret ptr_rc_tailcall:$dst, timm:$off),
1234 def : Pat<(X86tcret_6regs (load addr:$dst), timm:$off),
1238 def : Pat<(X86tcret ptr_rc_tailcall:$dst, timm:$off),
1242 def : Pat<(X86tcret ptr_rc_tailcall:$dst, timm:$off),
1246 def : Pat<(X86tcret (i64 tglobaladdr:$dst), timm:$off),
1250 def : Pat<(X86tcret (i64 texternalsym:$dst), timm:$off),
1255 def : Pat<(X86call (i32 tglobaladdr:$dst)),
1257 def : Pat<(X86call (i32 texternalsym:$dst)),
1259 def : Pat<(X86call (i32 imm:$dst)),
1265 def : Pat<(X86cmp GR8:$src1, 0),
1267 def : Pat<(X86cmp GR16:$src1, 0),
1269 def : Pat<(X86cmp GR32:$src1, 0),
1271 def : Pat<(X86cmp GR64:$src1, 0),
1277 def : Pat<(zextloadi8i1  addr:$src), (MOV8rm addr:$src)>;
1278 def : Pat<(zextloadi16i1 addr:$src),
1280 def : Pat<(zextloadi32i1 addr:$src), (MOVZX32rm8 addr:$src)>;
1281 def : Pat<(zextloadi64i1 addr:$src),
1289 def : Pat<(extloadi8i1 addr:$src),   (MOV8rm      addr:$src)>;
1290 def : Pat<(extloadi16i1 addr:$src),
1292 def : Pat<(extloadi32i1 addr:$src),  (MOVZX32rm8  addr:$src)>;
1293 def : Pat<(extloadi16i8 addr:$src),
1295 def : Pat<(extloadi32i8 addr:$src),  (MOVZX32rm8  addr:$src)>;
1296 def : Pat<(extloadi32i16 addr:$src), (MOVZX32rm16 addr:$src)>;
1302 def : Pat<(extloadi64i32 addr:$src),
1304 def : Pat<(extloadi64i1 addr:$src),
1306 def : Pat<(extloadi64i8 addr:$src),
1308 def : Pat<(extloadi64i16 addr:$src),
1313 def : Pat<(i16 (anyext GR8 :$src)), (EXTRACT_SUBREG
1315 def : Pat<(i32 (anyext GR8 :$src)), (MOVZX32rr8  GR8 :$src)>;
1318 def : Pat<(i32 (anyext GR16:$src)),
1321 def : Pat<(i64 (anyext GR8 :$src)),
1323 def : Pat<(i64 (anyext GR16:$src)),
1325 def : Pat<(i64 (anyext GR32:$src)),
1336 def : Pat<(i32 (anyext_sdiv GR8:$src)), (MOVSX32rr8 GR8:$src)>;
1353 def : Pat<(i64 (zext def32:$src)),
1355 def : Pat<(i64 (and (anyext def32:$src), 0x00000000FFFFFFFF)),
1459 def : Pat<(sub_is_xor imm:$src2, GR8:$src1),
1461 def : Pat<(sub_is_xor i16immSExt8:$src2, GR16:$src1),
1463 def : Pat<(sub_is_xor imm:$src2, GR16:$src1),
1465 def : Pat<(sub_is_xor i32immSExt8:$src2, GR32:$src1),
1467 def : Pat<(sub_is_xor imm:$src2, GR32:$src1),
1469 def : Pat<(sub_is_xor i64immSExt8:$src2, GR64:$src1),
1471 def : Pat<(sub_is_xor i64immSExt32:$src2, GR64:$src1),
1481 def : Pat<(add GR16:$src1, 128),
1483 def : Pat<(store (add (loadi16 addr:$dst), 128), addr:$dst),
1486 def : Pat<(add GR32:$src1, 128),
1488 def : Pat<(store (add (loadi32 addr:$dst), 128), addr:$dst),
1491 def : Pat<(add GR64:$src1, 128),
1493 def : Pat<(store (add (loadi64 addr:$dst), 128), addr:$dst),
1496 def : Pat<(X86add_flag_nocf GR16:$src1, 128),
1498 def : Pat<(X86add_flag_nocf GR32:$src1, 128),
1500 def : Pat<(X86add_flag_nocf GR64:$src1, 128),
1505 def : Pat<(add GR64:$src1, 0x0000000080000000),
1507 def : Pat<(store (add (loadi64 addr:$dst), 0x0000000080000000), addr:$dst),
1510 def : Pat<(X86add_flag_nocf GR64:$src1, 0x0000000080000000),
1522 def : Pat<(and GR64:$src, i64immZExt32SExt8:$imm),
1530 def : Pat<(and GR64:$src, i64immZExt32:$imm),
1545 def : Pat<(and GR32:$src1, 0xffff),
1548 def : Pat<(and GR32:$src1, 0xff),
1551 def : Pat<(and GR16:$src1, 0xff),
1556 def : Pat<(and GR64:$src, 0x00000000FFFFFFFF),
1561 def : Pat<(and GR64:$src, 0xffff),
1566 def : Pat<(and GR64:$src, 0xff),
1595   def : Pat<(and GR64:$src1, BTRMask64:$mask),
1597   def : Pat<(or GR64:$src1, BTCBTSMask64:$mask),
1599   def : Pat<(xor GR64:$src1, BTCBTSMask64:$mask),
1605 def : Pat<(sext_inreg GR32:$src, i16),
1607 def : Pat<(sext_inreg GR32:$src, i8),
1610 def : Pat<(sext_inreg GR16:$src, i8),
1614 def : Pat<(sext_inreg GR64:$src, i32),
1616 def : Pat<(sext_inreg GR64:$src, i16),
1618 def : Pat<(sext_inreg GR64:$src, i8),
1622 def: Pat<(i16 (sext GR8:$src)),
1624 def: Pat<(sextloadi16i8 addr:$src),
1626 def: Pat<(i16 (zext GR8:$src)),
1628 def: Pat<(zextloadi16i8 addr:$src),
1632 def : Pat<(i16 (trunc GR32:$src)),
1634 def : Pat<(i8 (trunc GR32:$src)),
1638 def : Pat<(i8 (trunc GR16:$src)),
1642 def : Pat<(i32 (trunc GR64:$src)),
1644 def : Pat<(i16 (trunc GR64:$src)),
1646 def : Pat<(i8 (trunc GR64:$src)),
1648 def : Pat<(i8 (trunc GR32:$src)),
1651 def : Pat<(i8 (trunc GR16:$src)),
1660 def : Pat<(i8 (trunc (srl_su GR16:$src, (i8 8)))),
1663 def : Pat<(i8 (trunc (srl_su (i32 (anyext GR16:$src)), (i8 8)))),
1666 def : Pat<(i8 (trunc (srl_su GR32:$src, (i8 8)))),
1669 def : Pat<(srl GR16:$src, (i8 8)),
1673 def : Pat<(i32 (zext (srl_su GR16:$src, (i8 8)))),
1675 def : Pat<(i32 (anyext (srl_su GR16:$src, (i8 8)))),
1677 def : Pat<(and (srl_su GR32:$src, (i8 8)), (i32 255)),
1679 def : Pat<(srl (and_su GR32:$src, immff00_ffff), (i8 8)),
1690 def : Pat<(and (srl_su GR64:$src, (i8 8)), (i64 255)),
1696 def : Pat<(i64 (zext (srl_su GR16:$src, (i8 8)))),
1702 def : Pat<(i64 (anyext (srl_su GR16:$src, (i8 8)))),
1710 def : Pat<(store (i8 (trunc_su (srl_su GR64:$src, (i8 8)))), addr:$dst),
1714 def : Pat<(store (i8 (trunc_su (srl_su GR32:$src, (i8 8)))), addr:$dst),
1719 def : Pat<(store (i8 (trunc_su (srl_su GR16:$src, (i8 8)))), addr:$dst),
1731 def : Pat<(X86xor_flag (i8 (trunc GR32:$src)),
1742 def : Pat<(shl GR8 :$src1, (i8 1)), (ADD8rr  GR8 :$src1, GR8 :$src1)>;
1743 def : Pat<(shl GR16:$src1, (i8 1)), (ADD16rr GR16:$src1, GR16:$src1)>;
1744 def : Pat<(shl GR32:$src1, (i8 1)), (ADD32rr GR32:$src1, GR32:$src1)>;
1745 def : Pat<(shl GR64:$src1, (i8 1)), (ADD64rr GR64:$src1, GR64:$src1)>;
1767   def : Pat<(frag GR8:$src1, (shiftMask32 CL)),
1769   def : Pat<(frag GR16:$src1, (shiftMask32 CL)),
1771   def : Pat<(frag GR32:$src1, (shiftMask32 CL)),
1773   def : Pat<(store (frag (loadi8 addr:$dst), (shiftMask32 CL)), addr:$dst),
1775   def : Pat<(store (frag (loadi16 addr:$dst), (shiftMask32 CL)), addr:$dst),
1777   def : Pat<(store (frag (loadi32 addr:$dst), (shiftMask32 CL)), addr:$dst),
1781   def : Pat<(frag GR64:$src1, (shiftMask64 CL)),
1783   def : Pat<(store (frag (loadi64 addr:$dst), (shiftMask64 CL)), addr:$dst),
1799   def : Pat<(frag GR8:$src1, (shiftMask8 CL)),
1801   def : Pat<(frag GR16:$src1, (shiftMask16 CL)),
1803   def : Pat<(frag GR32:$src1, (shiftMask32 CL)),
1805   def : Pat<(store (frag (loadi8 addr:$dst), (shiftMask8 CL)), addr:$dst),
1807   def : Pat<(store (frag (loadi16 addr:$dst), (shiftMask16 CL)), addr:$dst),
1809   def : Pat<(store (frag (loadi32 addr:$dst), (shiftMask32 CL)), addr:$dst),
1813   def : Pat<(frag GR64:$src1, (shiftMask64 CL)),
1815   def : Pat<(store (frag (loadi64 addr:$dst), (shiftMask64 CL)), addr:$dst),
1825 def : Pat<(X86fshl GR16:$src1, GR16:$src2, (shiftMask32 CL)),
1827 def : Pat<(X86fshr GR16:$src2, GR16:$src1, (shiftMask32 CL)),
1831 def : Pat<(fshl GR32:$src1, GR32:$src2, (shiftMask32 CL)),
1833 def : Pat<(fshr GR32:$src2, GR32:$src1, (shiftMask32 CL)),
1837 def : Pat<(fshl GR64:$src1, GR64:$src2, (shiftMask64 CL)),
1839 def : Pat<(fshr GR64:$src2, GR64:$src1, (shiftMask64 CL)),
1844     def : Pat<(sra GR32:$src1, (shiftMask32 GR8:$src2)),
1848     def : Pat<(sra GR64:$src1, (shiftMask64 GR8:$src2)),
1853     def : Pat<(srl GR32:$src1, (shiftMask32 GR8:$src2)),
1857     def : Pat<(srl GR64:$src1, (shiftMask64 GR8:$src2)),
1862     def : Pat<(shl GR32:$src1, (shiftMask32 GR8:$src2)),
1866     def : Pat<(shl GR64:$src1, (shiftMask64 GR8:$src2)),
1872   def : Pat<(sra (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1876   def : Pat<(sra (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1881   def : Pat<(srl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1885   def : Pat<(srl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1890   def : Pat<(shl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1894   def : Pat<(shl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1904   def : Pat<(and RC:$src1, (rotl -2, GR8:$src2)),
1907   def : Pat<(or RC:$src1, (shl 1, GR8:$src2)),
1910   def : Pat<(xor RC:$src1, (shl 1, GR8:$src2)),
1915   def : Pat<(and RC:$src1, (rotl -2, (ShiftMask GR8:$src2))),
1918   def : Pat<(or RC:$src1, (shl 1, (ShiftMask GR8:$src2))),
1921   def : Pat<(xor RC:$src1, (shl 1, (ShiftMask GR8:$src2))),
1935 def : Pat<(add GR8 :$src1, GR8 :$src2), (ADD8rr  GR8 :$src1, GR8 :$src2)>;
1936 def : Pat<(add GR16:$src1, GR16:$src2), (ADD16rr GR16:$src1, GR16:$src2)>;
1937 def : Pat<(add GR32:$src1, GR32:$src2), (ADD32rr GR32:$src1, GR32:$src2)>;
1938 def : Pat<(add GR64:$src1, GR64:$src2), (ADD64rr GR64:$src1, GR64:$src2)>;
1941 def : Pat<(add GR8:$src1, (loadi8 addr:$src2)),
1943 def : Pat<(add GR16:$src1, (loadi16 addr:$src2)),
1945 def : Pat<(add GR32:$src1, (loadi32 addr:$src2)),
1947 def : Pat<(add GR64:$src1, (loadi64 addr:$src2)),
1951 def : Pat<(add GR8 :$src1, imm:$src2), (ADD8ri  GR8:$src1 , imm:$src2)>;
1952 def : Pat<(add GR16:$src1, imm:$src2), (ADD16ri GR16:$src1, imm:$src2)>;
1953 def : Pat<(add GR32:$src1, imm:$src2), (ADD32ri GR32:$src1, imm:$src2)>;
1954 def : Pat<(add GR16:$src1, i16immSExt8:$src2),
1956 def : Pat<(add GR32:$src1, i32immSExt8:$src2),
1958 def : Pat<(add GR64:$src1, i64immSExt8:$src2),
1960 def : Pat<(add GR64:$src1, i64immSExt32:$src2),
1964 def : Pat<(sub GR8 :$src1, GR8 :$src2), (SUB8rr  GR8 :$src1, GR8 :$src2)>;
1965 def : Pat<(sub GR16:$src1, GR16:$src2), (SUB16rr GR16:$src1, GR16:$src2)>;
1966 def : Pat<(sub GR32:$src1, GR32:$src2), (SUB32rr GR32:$src1, GR32:$src2)>;
1967 def : Pat<(sub GR64:$src1, GR64:$src2), (SUB64rr GR64:$src1, GR64:$src2)>;
1970 def : Pat<(sub GR8:$src1, (loadi8 addr:$src2)),
1972 def : Pat<(sub GR16:$src1, (loadi16 addr:$src2)),
1974 def : Pat<(sub GR32:$src1, (loadi32 addr:$src2)),
1976 def : Pat<(sub GR64:$src1, (loadi64 addr:$src2)),
1980 def : Pat<(sub GR8:$src1, imm:$src2),
1982 def : Pat<(sub GR16:$src1, imm:$src2),
1984 def : Pat<(sub GR32:$src1, imm:$src2),
1986 def : Pat<(sub GR16:$src1, i16immSExt8:$src2),
1988 def : Pat<(sub GR32:$src1, i32immSExt8:$src2),
1990 def : Pat<(sub GR64:$src1, i64immSExt8:$src2),
1992 def : Pat<(sub GR64:$src1, i64immSExt32:$src2),
1996 def : Pat<(X86sub_flag 0, GR8 :$src), (NEG8r  GR8 :$src)>;
1997 def : Pat<(X86sub_flag 0, GR16:$src), (NEG16r GR16:$src)>;
1998 def : Pat<(X86sub_flag 0, GR32:$src), (NEG32r GR32:$src)>;
1999 def : Pat<(X86sub_flag 0, GR64:$src), (NEG64r GR64:$src)>;
2002 def : Pat<(mul GR16:$src1, GR16:$src2),
2004 def : Pat<(mul GR32:$src1, GR32:$src2),
2006 def : Pat<(mul GR64:$src1, GR64:$src2),
2010 def : Pat<(mul GR16:$src1, (loadi16 addr:$src2)),
2012 def : Pat<(mul GR32:$src1, (loadi32 addr:$src2)),
2014 def : Pat<(mul GR64:$src1, (loadi64 addr:$src2)),
2018 def : Pat<(mul GR16:$src1, imm:$src2),
2020 def : Pat<(mul GR32:$src1, imm:$src2),
2022 def : Pat<(mul GR16:$src1, i16immSExt8:$src2),
2024 def : Pat<(mul GR32:$src1, i32immSExt8:$src2),
2026 def : Pat<(mul GR64:$src1, i64immSExt8:$src2),
2028 def : Pat<(mul GR64:$src1, i64immSExt32:$src2),
2032 def : Pat<(mul (loadi16 addr:$src1), imm:$src2),
2034 def : Pat<(mul (loadi32 addr:$src1), imm:$src2),
2036 def : Pat<(mul (loadi16 addr:$src1), i16immSExt8:$src2),
2038 def : Pat<(mul (loadi32 addr:$src1), i32immSExt8:$src2),
2040 def : Pat<(mul (loadi64 addr:$src1), i64immSExt8:$src2),
2042 def : Pat<(mul (loadi64 addr:$src1), i64immSExt32:$src2),
2048   def : Pat<(add GR8:$src, 1),   (INC8r GR8:$src)>;
2049   def : Pat<(add GR16:$src, 1),  (INC16r GR16:$src)>;
2050   def : Pat<(add GR32:$src, 1),  (INC32r GR32:$src)>;
2051   def : Pat<(add GR64:$src, 1),  (INC64r GR64:$src)>;
2052   def : Pat<(add GR8:$src, -1),  (DEC8r GR8:$src)>;
2053   def : Pat<(add GR16:$src, -1), (DEC16r GR16:$src)>;
2054   def : Pat<(add GR32:$src, -1), (DEC32r GR32:$src)>;
2055   def : Pat<(add GR64:$src, -1), (DEC64r GR64:$src)>;
2057   def : Pat<(X86add_flag_nocf GR8:$src, -1),  (DEC8r GR8:$src)>;
2058   def : Pat<(X86add_flag_nocf GR16:$src, -1), (DEC16r GR16:$src)>;
2059   def : Pat<(X86add_flag_nocf GR32:$src, -1), (DEC32r GR32:$src)>;
2060   def : Pat<(X86add_flag_nocf GR64:$src, -1), (DEC64r GR64:$src)>;
2061   def : Pat<(X86sub_flag_nocf GR8:$src, -1),  (INC8r GR8:$src)>;
2062   def : Pat<(X86sub_flag_nocf GR16:$src, -1), (INC16r GR16:$src)>;
2063   def : Pat<(X86sub_flag_nocf GR32:$src, -1), (INC32r GR32:$src)>;
2064   def : Pat<(X86sub_flag_nocf GR64:$src, -1), (INC64r GR64:$src)>;
2068 def : Pat<(or GR8 :$src1, GR8 :$src2), (OR8rr  GR8 :$src1, GR8 :$src2)>;
2069 def : Pat<(or GR16:$src1, GR16:$src2), (OR16rr GR16:$src1, GR16:$src2)>;
2070 def : Pat<(or GR32:$src1, GR32:$src2), (OR32rr GR32:$src1, GR32:$src2)>;
2071 def : Pat<(or GR64:$src1, GR64:$src2), (OR64rr GR64:$src1, GR64:$src2)>;
2074 def : Pat<(or GR8:$src1, (loadi8 addr:$src2)),
2076 def : Pat<(or GR16:$src1, (loadi16 addr:$src2)),
2078 def : Pat<(or GR32:$src1, (loadi32 addr:$src2)),
2080 def : Pat<(or GR64:$src1, (loadi64 addr:$src2)),
2084 def : Pat<(or GR8:$src1 , imm:$src2), (OR8ri  GR8 :$src1, imm:$src2)>;
2085 def : Pat<(or GR16:$src1, imm:$src2), (OR16ri GR16:$src1, imm:$src2)>;
2086 def : Pat<(or GR32:$src1, imm:$src2), (OR32ri GR32:$src1, imm:$src2)>;
2087 def : Pat<(or GR16:$src1, i16immSExt8:$src2),
2089 def : Pat<(or GR32:$src1, i32immSExt8:$src2),
2091 def : Pat<(or GR64:$src1, i64immSExt8:$src2),
2093 def : Pat<(or GR64:$src1, i64immSExt32:$src2),
2097 def : Pat<(xor GR8 :$src1, GR8 :$src2), (XOR8rr  GR8 :$src1, GR8 :$src2)>;
2098 def : Pat<(xor GR16:$src1, GR16:$src2), (XOR16rr GR16:$src1, GR16:$src2)>;
2099 def : Pat<(xor GR32:$src1, GR32:$src2), (XOR32rr GR32:$src1, GR32:$src2)>;
2100 def : Pat<(xor GR64:$src1, GR64:$src2), (XOR64rr GR64:$src1, GR64:$src2)>;
2103 def : Pat<(xor GR8:$src1, (loadi8 addr:$src2)),
2105 def : Pat<(xor GR16:$src1, (loadi16 addr:$src2)),
2107 def : Pat<(xor GR32:$src1, (loadi32 addr:$src2)),
2109 def : Pat<(xor GR64:$src1, (loadi64 addr:$src2)),
2113 def : Pat<(xor GR8:$src1, imm:$src2),
2115 def : Pat<(xor GR16:$src1, imm:$src2),
2117 def : Pat<(xor GR32:$src1, imm:$src2),
2119 def : Pat<(xor GR16:$src1, i16immSExt8:$src2),
2121 def : Pat<(xor GR32:$src1, i32immSExt8:$src2),
2123 def : Pat<(xor GR64:$src1, i64immSExt8:$src2),
2125 def : Pat<(xor GR64:$src1, i64immSExt32:$src2),
2129 def : Pat<(and GR8 :$src1, GR8 :$src2), (AND8rr  GR8 :$src1, GR8 :$src2)>;
2130 def : Pat<(and GR16:$src1, GR16:$src2), (AND16rr GR16:$src1, GR16:$src2)>;
2131 def : Pat<(and GR32:$src1, GR32:$src2), (AND32rr GR32:$src1, GR32:$src2)>;
2132 def : Pat<(and GR64:$src1, GR64:$src2), (AND64rr GR64:$src1, GR64:$src2)>;
2135 def : Pat<(and GR8:$src1, (loadi8 addr:$src2)),
2137 def : Pat<(and GR16:$src1, (loadi16 addr:$src2)),
2139 def : Pat<(and GR32:$src1, (loadi32 addr:$src2)),
2141 def : Pat<(and GR64:$src1, (loadi64 addr:$src2)),
2145 def : Pat<(and GR8:$src1, imm:$src2),
2147 def : Pat<(and GR16:$src1, imm:$src2),
2149 def : Pat<(and GR32:$src1, imm:$src2),
2151 def : Pat<(and GR16:$src1, i16immSExt8:$src2),
2153 def : Pat<(and GR32:$src1, i32immSExt8:$src2),
2155 def : Pat<(and GR64:$src1, i64immSExt8:$src2),
2157 def : Pat<(and GR64:$src1, i64immSExt32:$src2),
2161 def : Pat<(cttz_zero_undef GR16:$src), (BSF16rr GR16:$src)>;
2162 def : Pat<(cttz_zero_undef GR32:$src), (BSF32rr GR32:$src)>;
2163 def : Pat<(cttz_zero_undef GR64:$src), (BSF64rr GR64:$src)>;
2164 def : Pat<(cttz_zero_undef (loadi16 addr:$src)), (BSF16rm addr:$src)>;
2165 def : Pat<(cttz_zero_undef (loadi32 addr:$src)), (BSF32rm addr:$src)>;
2166 def : Pat<(cttz_zero_undef (loadi64 addr:$src)), (BSF64rm addr:$src)>;
2171  def : Pat<(bswap GR16:$src), (ROL16ri GR16:$src, (i8 8))>;