Lines Matching refs:Pat
10 // compiler, as well as Pat patterns used during instruction selection.
20 def : Pat<(f32 (extractelt (v4f32 VR128:$src), (iPTR 0))),
22 def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))),
28 def : Pat<(f32 (extractelt (v4f32 VR128X:$src), (iPTR 0))),
30 def : Pat<(f64 (extractelt (v2f64 VR128X:$src), (iPTR 0))),
36 def : Pat<(v4f32 (scalar_to_vector FR32:$src)),
39 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
45 def : Pat<(v4f32 (scalar_to_vector FR32X:$src)),
48 def : Pat<(v2f64 (scalar_to_vector FR64X:$src)),
60 def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR 0))),
63 def : Pat<(VT (insert_subvector undef, subRC:$src, (iPTR 0))),
108 def : Pat<(DstTy (insert_subvector immAllZerosV,
178 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
181 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
184 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
188 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
191 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
194 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
197 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
203 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
206 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
212 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
218 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
221 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
227 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
230 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
236 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
239 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
242 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
245 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
253 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
258 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
263 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
270 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
277 def : Pat<(v16i1 (insert_subvector (v16i1 immAllZerosV),
281 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
285 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
289 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
296 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
300 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
303 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
309 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
314 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
321 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
325 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
331 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
335 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
339 def : Pat<(v32i1 (insert_subvector (v32i1 immAllZerosV),
344 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
348 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
352 def : Pat<(v64i1 (insert_subvector (v64i1 immAllZerosV),
363 def : Pat<(alignedstore (f128 VR128:$src), addr:$dst),
365 def : Pat<(store (f128 VR128:$src), addr:$dst),
368 def : Pat<(alignedloadf128 addr:$src),
370 def : Pat<(loadf128 addr:$src),
375 def : Pat<(alignedstore (f128 VR128:$src), addr:$dst),
377 def : Pat<(store (f128 VR128:$src), addr:$dst),
380 def : Pat<(alignedloadf128 addr:$src),
382 def : Pat<(loadf128 addr:$src),
387 def : Pat<(alignedstore (f128 VR128X:$src), addr:$dst),
389 def : Pat<(store (f128 VR128X:$src), addr:$dst),
392 def : Pat<(alignedloadf128 addr:$src),
394 def : Pat<(loadf128 addr:$src),
400 def : Pat<(f128 (X86fand VR128:$src1, (memopf128 addr:$src2))),
403 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
406 def : Pat<(f128 (X86for VR128:$src1, (memopf128 addr:$src2))),
409 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
412 def : Pat<(f128 (X86fxor VR128:$src1, (memopf128 addr:$src2))),
415 def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
421 def : Pat<(f128 (X86fand VR128:$src1, (loadf128 addr:$src2))),
424 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
427 def : Pat<(f128 (X86for VR128:$src1, (loadf128 addr:$src2))),
430 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
433 def : Pat<(f128 (X86fxor VR128:$src1, (loadf128 addr:$src2))),
436 def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
442 def : Pat<(f128 (X86fand VR128X:$src1, (loadf128 addr:$src2))),
445 def : Pat<(f128 (X86fand VR128X:$src1, VR128X:$src2)),
448 def : Pat<(f128 (X86for VR128X:$src1, (loadf128 addr:$src2))),
451 def : Pat<(f128 (X86for VR128X:$src1, VR128X:$src2)),
454 def : Pat<(f128 (X86fxor VR128X:$src1, (loadf128 addr:$src2))),
457 def : Pat<(f128 (X86fxor VR128X:$src1, VR128X:$src2)),